# Amplifying small voltages (single mVpp or lower) in VGA / PGA in ASICs

Discussion in 'The Projects Forum' started by Tako, Nov 5, 2014.

1. ### Tako Thread Starter New Member

Oct 21, 2014
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I wonder how it is possible to construct VGA/PGA that is able to amplify signals which peak-to-peak voltage level is ~2 mV or even lower? What architectures can be used, taking into account that PGA is a part of ASIC. It is not a separate IC packed in a casing.

From my research I know that for PGA following architectures are used:

1. High-gain amplifier with resistor-network feedback

Of course, single input voltage (not differential input signal) architecture as inverting or non-inverting op amp can be used as well.

2. R-r attenuator

3. Differential pair with source degeneration

4. Transconductance ratio

I am aware that there are in-amps on the market that are a separate ICs. These in-amps use a classical 3-op-amp in-amp architecture:

However, they are constructed using super-beta BJTs. For example AD8221:

Its minimum input offset voltage is equal to 25 μV!

However there are ASICs which implement a full system and acquire comparable input sensitivity using PGAs. As an example, see AFE031 of Texas Instruments: http://www.ti.com/lit/ds/symlink/afe031.pdf .

It contains of two PGAs. PGA1 input signal range is 10 Vpp, while input signal range of PGA2 is from GND - 0.1 to 3.3 V + 0.1 V. Receive Sensitivity is equal to: 20 μVRMS, what is a wonderful result! I do not see information about voltage offset value of both PGA, but resolution (receive sensitivity) is remarkable.

What do you think, what architecture of PGAs are used in AFE031? I think that for PGA1 they used op-amp with resistor feedback network, due to the fact that the input signal range is 10 Vpp. It is rather not possible or complicated to have such input signal range using differential pair? If so, what op-amp architectures they used?

Did they use standard CMOS process or they used BJTs?