Hmm,

http://www.cs.wright.edu/~phe/EGR199/Lab_3/fig4.gif

F1 = 0.16/ ( C1 * Rin) = 0.32Hz
F2 = 0.16 /( C3 * R5) = 1Hz
F3 = 0.16/ ( C4 * RLoad ) = 8.5Hz

So your cut-off frequencies is equal Fc = 8.5Hz
So I don't know what you want?

why do we use 2 stage power bjt

To get more current gain. And we need that extra current gain, because we need isolate RL from the voltage amplifier stage (Q1).
The two BJT, will typically provide a current gain between 500
and 10K. This means that 4Ω load resistance will look like a load resistance (connect parallel to R9) between 2KΩ and 40KΩ
http://en.wikipedia.org/wiki/Sziklai_pair

As for THD read this
http://www.ece.tamu.edu/~karsilay/ecen326/Lab_Reference_Manual.pdf

 

why do we use 2 stage power bjt?

It is called a Sziklai pair, look at it in Google. It has the high current gain of a darlington but half the voltage loss.

i thought that i can arrange cot off frequencies by changing capacitor's values. but there is a sharp pole at 10Hz which i couldnt remove.

The low frequency rolloff is caused by the capacitor values. maybe your sim program does not go below 10Hz.

how can thd be calculated?

A proper SIM program shows you the output waveform which for this circuit will not be symmetrical because bootstrapping of R9 was not used.

 

So I don't know what you want?

i actually, want to have a bandwidth: 20Hz-20KHz and now trying to implement it with formulas you sended.
i want to see THD < %0.5 @4ohm with pspice
i want to find catalogue for power transistors i used and for convenient refrigerator.

As for THD read this
http://www.ece.tamu.edu/~karsilay/ecen326/Lab_Reference_Manual.pdf

this link is not working i guess.
again thanks for your helps.

 

The low frequency rolloff is caused by the capacitor values.

yes but i still couldnt get it into 20hz-20khz for 1 hour.

A proper SIM program shows you the output waveform which for this circuit will not be symmetrical because bootstrapping of R9 was not used.

i cant understand what bootstrap is, maybe because of the low pass filter in my brain. and i cant explain it in my rapor why i did something that good.

 

i hope i did not make you two bothered. because still i have things to ask.
i actually dont know why you are helping people,
but, since you are doing it, i go on asking

 

fk=f1*(2^(1/2)-1)^(1/2) if i choose cut off frequencies same
so, f1=20hz=> fk=10,2hz.

c3=1/(2pi10,2*330) = 472mF
c4=1/(2pi10,2*4) = 3,9 mF
c1=1/(2pi10,2*50k)=31,2 uF

and for high cut off frequency,

f2=fk*(2^(1/2)-1)^(1/2)
f2=20khz, => fk= 31khz

C6=1/(2pi*31k*R1//R3) =0.29nF
C2=1/(2pi*31k*R7)=16nF

and.. bode diagram had nearly no changes..

 

i forgot to add the attachment

 

LOL
For 20KHz you need add capacitor parallel to R13.
C = 0.16 / ( 20KHz * 47K ) = 170pF = 180pF
For 20Hz
C1 = 0.16/ ( 20Hz * Rin) = 220nF

And your Rin = R1||R2 = 33K

So you need to increase Rin some how.

 

LOL
For 20KHz you need add capacitor parallel to R13.
C = 0.16 / ( 20KHz * 47K ) = 170pF = 180pF
For 20Hz
C1 = 0.16/ ( 20Hz * Rin) = 220nF

And your Rin = R1||R2 = 33K

So you need to increase Rin it some how.

i tried your values.

 

C8 parallel to R13.
And it seems that you don't know how properly setup AC sweep in PSpice .

 

its all ok now.
succeeding something is a great feeling

( i cant ignore your little help though.)

 

but refrigator catalogues

 

but refrigator catalogues

What are you trying to say ?

 

i need to find catalogues for power transistors i used, and a convenient refrigator(cooler or sth) for them, from any brand.
i think i found the datasheet

 

A transistor is cooled with a heatsink. Beer is cooled with a refrigerator.

The BD135-BD139 are in a very old case style that is difficult to cool so they might overheat.

Your graph of "time sweep" is very strange. Instead you should show a simulation of the output waveform appearance when the input is a continuous 1kHz sine-wave and the output is at 20W.
Then it will show if the output is clipping and distorting.

 

Google has all data-sheet.
As for convenient refrigator(cooler or sth) type heat sink to Google

The Max power dissipation in AB class output stage is equal
Vcc²/(20Rl) = 15.4W + Vce * Icq
So you have 8W per BJT ( Q4 / Q5 ) So you need bigger output BJT.

Vce/Icq = bias point Vce and Ic

 

Your graph of "time sweep" is very strange. Instead you should show a simulation of the output waveform appearance when the input is a continuous 1kHz sine-wave and the output is at 20W.
Then it will show if the output is clipping and distorting.

This graph show average output power.
And it look strange because PSpice calculates the correct value only in full period time.

 

Time has nothing to do with amplifier output power. Output power is not just a short duration pulse, it is continuous power.

Feed a 1khz sine-wave to the input and increase it until the output clips or the output power is 20W. Then it will show the output waveform which should look like a sine-wave.

 

it says only T0-3 T0-220 and T0-126 packet power transistors are allowed in hw. i dont know if i used in one of them or not.

can you advice me a good and bigger output pwrbjt?

and i calculated my THD, %70.

 

For a 20W into 8 ohms amplifier usually new TO-220 output transistors are used.
But you selected old BD185 and BD186 transistors that are over 40 years old and their datasheet says the case is a TO-126.
I don't know what country you are in so I can't recommend a good transistor that is used in my country.

Your teacher gave instructions that the distortion must be less than 0.5%.
I do not know how you calculated distortion to be extremely high at 70%.

Please post the output waveform when the output power is 20W into 8 ohms and the input is a sine-wave at 1kHz.