Implement to the gate and full adder level an ALU bit slice with three
operation selection inputs S2; S1; S0, that implements the following eight functions of
the two data inputs A and B (and carry-in Ci):
S2 S1 S0 ALU operation
0 0 0 Fi = 0
0 0 1 Fi = B .. A
0 1 0 Fi = A .. B
0 1 1 Fi = A + B
1 0 0 Fi = AxorB
1 0 1 Fi = AorB
1 1 0 Fi = AandB
1 1 1 FI = 1
2

 

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