Advise for a circuit

Discussion in 'Digital Circuit Design' started by Bamerni, Jul 25, 2016.

  1. Bamerni

    Thread Starter New Member

    Jun 26, 2016
    12
    0
    Hello everyone

    I have a simple question

    I want to design a simple logic circuit that has an output of '0' for 5 clock cycle and '1' for the next five cycle and so on.

    I thinking to use a T-type flip-flop with a 5 register connected to feedback to the input.

    can anyone suggest me a more simple circuit or other idea.
     
  2. blocco a spirale

    AAC Fanatic!

    Jun 18, 2008
    1,440
    368
    A 4017 decade counter with the top 5 outputs diode-ORed together.
     
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  3. AlbertHall

    Well-Known Member

    Jun 4, 2014
    1,968
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    Yup, that's good.
    Unless it's got to work with TTL.
     
  4. Bamerni

    Thread Starter New Member

    Jun 26, 2016
    12
    0
    thank you
    I think that this is easier to implement than T flip-flop
     
  5. Bamerni

    Thread Starter New Member

    Jun 26, 2016
    12
    0
    thank you
    I think that this is easier to implement than T flip-flop
     
  6. crutschow

    Expert

    Mar 14, 2008
    13,052
    3,244
    You could also use a CD4068 8-input OR gate, or three CD4075 3-input OR gates connected to five sequential outputs of the CD4017.
    The LTspice simulation is show below using three CD4075 gates (in one package).

    Note that power and ground pins are not shown.

    upload_2016-7-25_18-14-0.png
     
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  7. MrChips

    Moderator

    Oct 2, 2009
    12,449
    3,365
    What you need is a divide-by-10 counter.
    The 74LS90 has a divide-by-5 and divide-by-2 stage, perfect for what you need.
     
  8. crutschow

    Expert

    Mar 14, 2008
    13,052
    3,244
    Flash.
    I just noticed that the CD4017 has a /Q5_9 output which gives the divide by ten, 50% duty-cycle pulse desired, no added parts needed, as shown below

    upload_2016-7-25_22-36-38.png
     
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  9. ScottWang

    Moderator

    Aug 23, 2012
    4,855
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    0 - 5 clocks
    1 - 5 clocks
    What's 0, 1 used for, since they are all output 5 clocks?
    It seems like a 50%/50% duty cycle execution procedure, what is the load or next device for 5 clocks?
     
  10. Mohit Singhal

    New Member

    Aug 12, 2016
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    i guess it is for the negative and positive units.
     
  11. crutschow

    Expert

    Mar 14, 2008
    13,052
    3,244
    I have no idea what that means. :confused:
    What are the "units"?
     
  12. AnalogKid

    Distinguished Member

    Aug 1, 2013
    4,546
    1,252
    Here is a variation of the original question, adaptable to many more pulse widths and duty cycles. The leading edges of two of the 4017 outputs either set or reset a simple flipflop, and the leading edge of a third output resets the 4017 to start another cycle. Moving TAP1 adjusts the number of clock cycles the output is high. Moving TAP2 adjusts the number of clock cycles the output is low. Note that TAP2 always must be connected to a higher output than TAP1.

    For the variation shown in the drawing, the output is high for 5 clocks and low for 3 clocks. When Y8 goes high it resets the 4017, which immediately pulls Y8 low and drives Y0 high, which sets the flipflop.

    U1C and U1D form a simple oscillator, something to do with the two unused gates.

    ak
    4017-FF-1-c.gif
     
  13. BillB3857

    Senior Member

    Feb 28, 2009
    2,400
    348
    I would have to agree that the 7490 variations would be perfect. A look at the data sheet would confirm that depending upon which way the binary FF is strapped, it can be either a standard BCD or a Bi-Quinary counter, Back in the dark ages we had a control unit made by Bunker-Ramo that used the Bi-Quinary numbering system. Of course, that was back in the time before integrated circuits, just lots of transistors, diodes and resistors with a few caps for good measure.
     
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