adders don't work..

Discussion in 'Homework Help' started by jun, Dec 4, 2008.

  1. jun

    Thread Starter New Member

    Dec 4, 2008
    Hello, everybody

    I designed CMOS and CPL full adders but they don't work..
    both CMOS and CPL XOR gates work correctly but when I put them into the adder circuits, the results don't make any sense.

    Is there anyone has idea what is the problem? At first, I thought it was a problem with CPL transistors, cause this was my first time to design CPL logics. But CMOS adder also doesn't work correctly, so I think it's not a problem with CPL. Then, I thought it was a MOS sizing problem so I tried to fix it, but I have no idea which one I have to change.

    Please let me know what's the problem and possible way to fix.
    I'm working in Cadence Virtuoso.

  2. mik3

    Senior Member

    Feb 4, 2008
    A schematic if possible will be helpful.
  3. jun

    Thread Starter New Member

    Dec 4, 2008
    sorry, but I can't put pictures on here..
    by the way, I fixed the problem with a CMOS adder. CPL adder still doesn't work but it's ok at this moment. Thank you.
  4. bertus


    Apr 5, 2008

    Why do you say that you can not place pictures?
    In the FAQ is the following text about this :

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  5. jun

    Thread Starter New Member

    Dec 4, 2008
    Thanks a lot. I hadn't checked FAQ and/or other menus cause I just joined yesterday.
    I will check them from this time. Thank you again.
  6. jun

    Thread Starter New Member

    Dec 4, 2008
    By the way, I have a new question if I may ask here.
    To design low power circuits, I'd like to use MTCMOS. Then, is that all putting 2 High Vth MOS next to Vdd and Gnd? I am trying now, but I have no idea which signal I have to use from the original adder as a "sleep" signal which open or close those High Vth MOS. Do I have to have 1 more input signal?