Active Low Switch

Thread Starter

skybox

Joined Mar 2, 2009
68
Hi guys,

I am working on a device that starts recording video when the input is attached to ground (otherwise 0V).

I have designed the following. My idea here is that when the microprocessor first starts up, it sends 5 or 3.3 V so the switch is on all the time (microprocessor signal goes into pin 5). When I want the device to start recording, I simply just turn off the FET so the outputs (pins 2,3) are 0 and this tells the device to start recording.

Is there a more efficient way to do this?

Thanks
 

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As the PMOS is fed from a higher voltage than the micro, this would be the standard architecture for a high-side switch. If you like, it can be a little more complicated by adding small resistors (10s to a few 100 ohms) in series with the MOSFET gates to buffer the micro output from the gate capacitance. But you'll probably get by without them if the FETs aren't too big.

Check that the NMOS guaranteed Vgs threshold is within range of the micro output voltage (5V is too low to guarantee a turnon for some NFETs, and 3V3 is too low for most); also check that the maximum Vgs spec for the PFET is greater than 14.4V + a bit of margin. If not, add a series resistor to form a potential divider with the top resistor, or choose a more tolerant FET.

The PMOS symbol is wrong, as the parasitic diode is backwards. Correct the symbol and then swap over the drain and source on the schematic (the diode being backwards probably led to these being transposed) and the circuit should work a treat.

If you're using this to energise a relay coil then you could do it with one common-source NMOS, but you'd have to invert the control logic. That would be simpler.
 

Thread Starter

skybox

Joined Mar 2, 2009
68
As the PMOS is fed from a higher voltage than the micro, this would be the standard architecture for a high-side switch. If you like, it can be a little more complicated by adding small resistors (10s to a few 100 ohms) in series with the MOSFET gates to buffer the micro output from the gate capacitance. But you'll probably get by without them if the FETs aren't too big.

Check that the NMOS guaranteed Vgs threshold is within range of the micro output voltage (5V is too low to guarantee a turnon for some NFETs, and 3V3 is too low for most); also check that the maximum Vgs spec for the PFET is greater than 14.4V + a bit of margin. If not, add a series resistor to form a potential divider with the top resistor, or choose a more tolerant FET.

The PMOS symbol is wrong, as the parasitic diode is backwards. Correct the symbol and then swap over the drain and source on the schematic (the diode being backwards probably led to these being transposed) and the circuit should work a treat.

If you're using this to energise a relay coil then you could do it with one common-source NMOS, but you'd have to invert the control logic. That would be simpler.
Thanks Darren. That was really helpful!
 
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