About 8 bit latch by 74373 chip...

Discussion in 'General Electronics Chat' started by RRITESH KAKKAR, Sep 10, 2011.

  1. RRITESH KAKKAR

    Thread Starter Senior Member

    Jun 29, 2010
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    Hello,

    I am using 74373 to latch AD0 - AD7, but the problem is the enable pin that is pin 11, but when i change it to Vcc and gnd there is no change...,why??

    and i am taking output from Qn...and input to Dn..
     
  2. t06afre

    AAC Fanatic!

    May 11, 2009
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    Schematics my friend. Always schematic my friend.....
     
  3. RRITESH KAKKAR

    Thread Starter Senior Member

    Jun 29, 2010
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    here is my 74373 schematic...
    I am connecting OE to Gnd, the Enable pin is used by ALE(addr. latch enable) of 8085.
    When, i connect it to gnd and vcc, the output remain the same.
    why??
     
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  4. eblc1388

    Senior Member

    Nov 28, 2008
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    The ENABLE pin enable the latch.

    When the ENABLE pin is HIGH, what happens on the D inputs will be seen on the Q outputs, so the latch is like a wire connecting D input to Q output.

    When the ENABLE pin is LOW, the latch is enabled and the Q outputs retain the logic state prior to the ENABLE pin goes LOW. At this moment, changing the D inputs will cause no effect to the Q outputs.
     
  5. SgtWookie

    Expert

    Jul 17, 2007
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    Pin 1 (output enable) is active low.
    When pin 1 is low, the output is enabled.
    When pin 1 is low, raising pin 11 (latch enable) will cause the Qn output to follow the Dn input. With pin 11 low, Qn will remain in the state it was last when pin 11 was high, unless pin 1 goes high.
    When pin 1 is high, the output is in a high impedance state, and the output won't change with inputs to the latch enable (pin 11) or data.
    With pin 1 high, you should be able to use high-value pull-up resistors to Vcc or GND to change the default (high impedance) logic level if desired.
     
    Last edited: Sep 10, 2011
  6. eblc1388

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    Sqt, either you or I have made a silly mistake about pin#11. :D

    [​IMG]
     
  7. SgtWookie

    Expert

    Jul 17, 2007
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    Yes, it was me. :rolleyes:
    I'll blame it on alackacoffee. ;)

    I've edited my prior reply to correct it.
     
  8. t06afre

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    I also think it would be more correct to use a 74xx374. Tie the pin 1 on the latch low. And then tie the ALE from the 8085 to the clock input (pin 11) on the 74xx374 via a inverter
     
  9. RRITESH KAKKAR

    Thread Starter Senior Member

    Jun 29, 2010
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    OK, i have to connect this Enable pin (11) to ALE of 8085 as per schematic of 8085..
    what the need of it??
     
  10. Papabravo

    Expert

    Feb 24, 2006
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    Because the bus (AD0-AD7) has both address information and data information on the D-inputs. The purpose of ALE(Address Latche Enable) is to capture the low order address information at the beginning of the cycle and hold it for any memory or I/O devices that want to decode this information.

    After ALE goes low the D-inputs become the data and the Q outputs hold the address bits until the next cycle when ALE will go high again and capture a new address. It's all explained in the datasheet and hardware manual.
     
  11. RRITESH KAKKAR

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    Thanks, for the help i got it...
    thanks
     
  12. RRITESH KAKKAR

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    pics of 8085:-
     
  13. RRITESH KAKKAR

    Thread Starter Senior Member

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    Ok, how to choose the bypass capacitor value for quartz crystal of 4Mhz..??
     
  14. RRITESH KAKKAR

    Thread Starter Senior Member

    Jun 29, 2010
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    help please....
     
  15. stahta01

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    Jun 9, 2011
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    I disagree, no inverter is needed between ALE and 74373

    Note: Everything in this quote is correct; but your conclusion is wrong.

    Edit: I just found the cause of the confusion; an inverter is needed between ALE and 74374; but is not needed between ALE and 74373 chip.



    The ALE is designed so that the Address (AD0-AD7) is supposed to be latched during the trailing/falling edge of the ALE pulse.

    On the raising edge my reference books says the address is still settling; after the ALE going low the address (AD0-AD7) is still valid for almost half a clock cycle.

    And, another site shows the same.
    http://www.8085projects.info/IO-Interfacing-Methods.html

    Tim S.
     
    Last edited: Sep 17, 2011
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  16. RRITESH KAKKAR

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    yes ......
     
  17. stahta01

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    My 1981 reference book shows no bypass caps; says just hookup an 1 to 6 Mhz crystal and the 8085 divides it by 2 to get its speed. So a 3 Mhz 8085 uses an 6 MHz crystal. Edit: It been decades since I read this book; I bought it brand new.

    ISBN: 0-13-691089-0 Practical Hardware Details for 8080, 8085, Z80 and 6800 Microprocessor Systems by James Coffron


    Google lets you get some results for "Microprocessor 8085 And Its Interfacing" By Mathur

    Tim S.
     
    Last edited: Sep 17, 2011
  18. RRITESH KAKKAR

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    Jun 29, 2010
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    have ever made its hardware..??
     
  19. thatoneguy

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  20. stahta01

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    Jun 9, 2011
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    No, I was thinking of doing the Z80 or 6800 project at the time; never really built them myself. But, the school I was at had an 6800 based board that I did projects with at the time.

    Tim S.
     
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