In 8051, we know that PSEN provides the enabling signal for the External Code ROM. Obviously, the CPU takes care of this when a command like MOVC is used.
In the case of External Data memory, along with an address decoder, RD and WR pins in PORT 3 are to perform a similar function .
Do these get activated by the CPU too when an instruction like MOVX is used, or does the programmer have to look after this every time data has to be read or written to/from RAM ?
What if PORT 3 is in IO mode ?
Does the CPU shift the Port pins over to their Secondary functions whenever a related instruction is executed, and of course shift the Port back to the IO mode when done ?
Thanks in advance for your taking the trouble in answering.
A Newbie
In the case of External Data memory, along with an address decoder, RD and WR pins in PORT 3 are to perform a similar function .
Do these get activated by the CPU too when an instruction like MOVX is used, or does the programmer have to look after this every time data has to be read or written to/from RAM ?
What if PORT 3 is in IO mode ?
Does the CPU shift the Port pins over to their Secondary functions whenever a related instruction is executed, and of course shift the Port back to the IO mode when done ?
Thanks in advance for your taking the trouble in answering.
A Newbie
