A simple analog block or Subcircuit in PSpice from a Verilog-A code

Discussion in 'General Electronics Chat' started by Charanraj Mohan, Feb 2, 2016.

  1. Charanraj Mohan

    Thread Starter New Member

    Feb 2, 2016
    2
    0
    Hi,
    I have a small Veriolog-A code and I need to implement it as a subcircuit in PSpice.

    Verilog-A code:

    // VerilogA for memr, memr_f, veriloga

    `include "constants.vams"
    `include "disciplines.vams"

    module memr_f(vp,vn,vout,vref);
    electrical vp,vn,vout,vref;
    parameter real vth=1,vo=1,Io=1e-9;
    real vd,id;

    analog begin
    vd = V(vp) - V(vn);
    if (vd>vth) begin
    id = Io*(exp(vd/vo)-exp(vth/vo));
    end else if (vd<-vth) begin
    id = -Io*(exp(-vd/vo)-exp(vth/vo));
    end else begin
    id=0;
    end

    I(vout,vref) <+ -id;
    end

    endmodule


    The netlist I wrote in PSpice:

    .SUBCKT memr_f vp vn vout vref params:vth=1.0, vo=0.1, Io=1e-5
    .func vd() {v(vp)-v(vn)}
    .func id() {IF(vd >= vth, Io*(exp(vd/vo)-exp(vth/vo)), IF(vd <=- vth, -Io*(exp(-vd/vo)-exp(vth/vo)), 0))}
    .func I(vout,vref) {id()}
    .ENDS

    But I couldn't proceed with the option 'Associate PSpice model'- it shows me an error-'Select a matching model in the grid to proceed'.
    How to rectify it ?
     
  2. mvaseem

    Member

    Jan 31, 2014
    48
    8
    Since you have a subckt, save it as .lib file. Open the file in model editor.
    Do File -> Export to Capture Part
    This would generate the capture part in olb with same pins as in subckt.
    Instantiate the part and configure lib file in pspice to simulate.

    However I think the functions you have written are not going to work.
    You would need to use behavioral devices (VCCS,VCVS) which are G and E devices in pspice.
     
  3. Charanraj Mohan

    Thread Starter New Member

    Feb 2, 2016
    2
    0
    Hi Mr.Mvaseem,
    I figured it out already. Thanks by the way.
     
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