a newbie question about LSR on avr assembply

Discussion in 'Embedded Systems and Microcontrollers' started by yiannistamv, Jan 27, 2015.

  1. yiannistamv

    Thread Starter Member

    Jul 23, 2014
    35
    0
    i am reading the book some assembly required and i'm reading
    "The left shift instruction is written “LSL Rd” and its machine code is 0000 11dd dddd dddd (the bold d’s are replaced by the binary code for the register and the other d’s are replaced by the same five bits). How can this be? Interpret this instruction as an ADD instruction and see what it really does. Compare this to the effect of a logical shift left. Is there a problem?"
    if this is an AND mask it will not be the same for all registers duo to other nbr i mean r16 is 10000 and r17 is 10001 unless it means something else can please someone help me?
     
  2. michael8

    New Member

    Jan 11, 2015
    18
    2
    There is no "real" LSL instruction in the 8 bit AVR -- it's the ADD instruction under a different name (all done in the assembler). ADD r3,r3 is the same as LSL r3 (meaning the assembler will output exactly the same code).

    see the AVR 8 bit instruction set pdf file (www.atmel.com/images/doc0856.pdf) pages on ADD and LSL. The first 6 bits of both instructions are the same and the rest is two register numbers (a bit interleaved).
     
  3. yiannistamv

    Thread Starter Member

    Jul 23, 2014
    35
    0
    thank you michael8 for your time to answer me but can you explain to me "The left shift instruction is written “LSL Rd” and its machine code is 0000 11dd dddd dddd (the bold d’s are replaced by the binary code for the register and the other d’s are replaced by the same five bits" says the book and as i can understand it refer to the content of the register not its nbr . if the lsl is the same as add if i have the 0b10010001 and execute lsl i would loose the high bit and the nbr would be less than first if i do not affect the carry flag of the status register and if you can please, what kind of logic operation is the add and what does a bit interleaved means?
     
  4. michael8

    New Member

    Jan 11, 2015
    18
    2
    > The left shift instruction is written “LSL Rd” and its machine code is 0000 11dD DDDD dddd

    Right, ok so far.

    > the bold d’s (I've made them caps, easier to see) are replaced by
    > the binary code for the register and the other d’s are replaced by
    > the same five bits" says the book and as i can understand it refer to
    > the content of the register not its nbr

    No. They are register numbers. This is an ADD instruction and it takes
    two register numbers. To get the effect of LSL from an ADD instruction
    you add the register to itself thus doubling the contents which is the
    same as a left shift by one bit.

    > if the lsl is the same as add if i have the 0b10010001 and execute lsl i
    > would loose the high bit and the nbr would be less than first if i do not
    > affect the carry flag of the status register and if you can please, what
    > kind of logic operation is the add

    add is addition -> one plus one gives two, also ADD and LSL both are
    documented as setting the flags (including carry). So the bit shifted
    out of the high end of the register will wind up in the carry (C) flag.

    > and what does a bit interleaved means?

    Whoever chose the bit patterns for the AVR instructions didn't put all
    the bits for the register numbers together. So using x to indicate
    bits not be discussed, in the ADD (and likely all) instruction the bits
    in xxxx xxxd dddd xxxx which are 'd' specify the destination register.
    And the other register is specified by the bits xxxx xxrx xxxx rrrr.
    See how the bits for the other register aren't next to each other and
    are interleaved with the d register bits...

    Do you have the the AVR 8 bit instruction set pdf file?
    (www.atmel.com/images/doc0856.pdf)
     
    absf likes this.
  5. yiannistamv

    Thread Starter Member

    Jul 23, 2014
    35
    0
    thank you i really thank you for your time
     
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