# 90 degree phase shift

Discussion in 'General Electronics Chat' started by kunalpowar1203, Mar 13, 2012.

1. ### kunalpowar1203 Thread Starter New Member

Feb 26, 2012
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How do i create a signal which is shifted by the original one by 90 degrees. ??? This signal has a max freq of about 30khz.All the other characteristics must be the same.

2. ### MrChips Moderator

Oct 2, 2009
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Is the signal at a fixed frequency? Otherwise it would be difficult.

3. ### praondevou AAC Fanatic!

Jul 9, 2011
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What waveform is it? Sine, square, etc.?

4. ### kunalpowar1203 Thread Starter New Member

Feb 26, 2012
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It is a square wave and yes the frequency is varying..ooooppps...

5. ### MrChips Moderator

Oct 2, 2009
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Well that makes it a bit easier.
I can think of a number of ways of doing it - phase-locked loop, digital counter, shift register etc.
Simple solution is to use a frequency doubler and D-flip-flops.
What kind of resolution do you need?

6. ### crutschow Expert

Mar 14, 2008
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For a square-wave 90° delay you could measure the period with a microprocessor and then have it generate a square-wave delayed by 1/4 of the period.

Feb 26, 2012
7
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Thanks a lot

8. ### praondevou AAC Fanatic!

Jul 9, 2011
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What are "all other characteristics"?

There is voltage (is it bipolar?) and duty cycle (is it 50% ?). What else?

9. ### crutschow Expert

Mar 14, 2008
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How do those methods generate a 90° shift? Any approach that uses the edges of the signal will generally be changing states at 0° or 180°.

10. ### MrChips Moderator

Oct 2, 2009
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I would use a PLL to generate a square wave that is x2 the signal frequency.

11. ### kunalpowar1203 Thread Starter New Member

Feb 26, 2012
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Its not bipolar and yes the duty cycle is 50percent.

12. ### crutschow Expert

Mar 14, 2008
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OK, that would work if you use a phase detector with 0° phase-shift at lock, such as the Type II detector in the CD4046. Then you use a divide by 2 counter clocked at the falling edge of the doubled signal to get the shift. You would need to also reset the counter at the rising edge of the input signal to insure that the delay is 90° and not 270°.

This only works, of course, over the lock range of the PLL.