# 74LS14 Hex Inverter Voltage Threshold

Discussion in 'General Electronics Chat' started by tttmmmsss, Apr 20, 2010.

1. ### tttmmmsss Thread Starter New Member

Apr 20, 2010
8
0
I'm looking at the datasheet for the TI 74LS14 Hex Schmitt Inverter and trying to figure this out...

I'm running a 5V supply, and am tuning a specific cap and resistor to oscillate. I would assume that the graph I need is the "Threshold Voltages and Hysteresis vs Supply Voltage" graph, but I'm not completely sure.

What I'm looking for is, as the voltage rises on the input of the Inverter, at what voltage does it trigger the output to become a logical 0, and during the decaying voltage on the input of the inverter, at what voltage does the output switch to a logical 1?

I'll be able to check this manually, I can use the scope at college to just rest the switching levels, but if I could figure out which graph to read from and how, tonight, I can get a jump on the calculations I need.

Thank you for any help in his matter!

~Tim S.

2. ### kingdano Member

Apr 14, 2010
377
19
The input and output voltage thresholds are given in tables in the datasheet.

I can explain them.

In short - there is a range of voltages at which the device will switch its output. They are referred to as Vt+ and Vt-; Positive/Negative Input Going Voltage Threshold.

It is important to understand, that this is from the device's perspective. In other words - think of this value as if you were looking out from the input pin to the inverter. The voltage which that node sees is what these levels refer to.

When the input pin sees a positive going voltage which passes between the threshold of 1.5-2.0VDC the output of the device will be set to a logic low level (this range of voltages is given in another section of the datasheet - we can discuss this as well if you need). If the input signal is negative going and reaches the negative going threshold range of 0.6-1.1VDC - the device will switch its output to a logic high level (again, given elsewhere in the datasheet).

Note that this device will not trigger a change in output if a negative going input falls to 1.5-2.0VDC - it will do so only when the input pin sees a negative going voltage back down to the threshold of 0.6-1.1VDC. Similarly it will not switch its output if a positive going signal reaches 1.1VDC. Between the two ranges is essentially no-mans land in digital logic.

if im wrong, delete away mods!

i dont want to misinform the masses!

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3. ### tttmmmsss Thread Starter New Member

Apr 20, 2010
8
0
Oh, great!

I see the table you posted, and it looks to agree with the graphs defining "Positive/Negative-Going Threshold Voltage" and "Threshold Voltage vs Supply Voltage" as well, but knowing those values from the table you pointed out made it all fit together for my to understand!

Thanks very much for the explanation!

One last thing..

I'm looking at the datasheet, and I see a set of values for $V_{OH}$ and $V_{OL}$, with Typical Characteristics of 3.4v and 0.25v respectively. Are these the output voltages from the chip for High and Low states?

Once more, thanks very much!

~Tim S.

4. ### kingdano Member

Apr 14, 2010
377
19
The direct answer to your questions are both yes - but i want to be as clear as possible.

The values you refer to - $V_{OH}$ and $V_{OL}$ are infact the output voltage levels of the device.

However, don't think of them as a specific value - you must always think of them as ranges - and do your best to design for the entire range - not just the typical point.

It is my view that this will create the most stable and "ideal" circuits - and should be achieved whenever possible. Sometimes you do have to make trade-offs in design though.

In addition to having a range of voltages to output - these values are also based on test conditions such as environmental conditions, as well as supply voltage, input voltage level and current drawn by the device.

For the most part - these details generally work themselves out if you are interfacing to other compatible logic - but they should be considered none-the-less - and at the very least acknowledged by the designer.

5. ### tttmmmsss Thread Starter New Member

Apr 20, 2010
8
0
Great!

Well again, thanks for taking a moment to explain this to me, it's been very helpful.

Have a great night!

~Tim S.

Apr 14, 2010
377
19