Hi all,

If send in 4 bits of data serially (Q1-Q4), when should I pulse the SRCLK pin to store this data. In the information section of this website, the SRCLK pulse started between t4 and t5.

Can I pulse the SRCLK on t4 or t5 to retrieve the 4 bits of data?

Thanks

 

why does not no one replies?

guess the question is too difficult to answer. Useless!

 

There are lots of people with questions, and not many that provide answers.

Why are you not using the 74HC595? That seems to be the most popular SIPO register as of late. It's much easier to use than the '594.

In the TI datasheet, the '594, SRCLK and RCLK are shown in the timing diagram to be 180° out of phase with each other. You need to clock data in using SERCLK, holding SERCLK\ high. Then hold RCLK\ high, and toggle RCLK from low to high and back again to latch the data. You need to allow settling time before toggling RCLK.

You don't have to worry about SERCLK\ and RCLK\ with the '595, because it doesn't have those inputs.

 

why does not no one replies?

guess the question is too difficult to answer. Useless!

I guess that reading the datasheet is too difficult to find out how this IC works. Useless!

http://www.ti.com/lit/gpn/sn74hc594

Also, here is the tech documents on TI's website. They will show you everything from sample circuits to how the parts in the circuit works.

Or you can ask your teacher after you flunk your homework.

http://focus.ti.com/docs/prod/folders/print/sn74hc594.html#technicaldocuments