A sequential circuit monitors the available parking spaces in a200-space parking garage and provides an indication of fullgarage by illuminating a FULL display sign and lowering theentrance gate bar .Salient features of the system are: .... A sensor at the entrance gate produces a positive 1TL pulsewhen a vehicle enters the garage.A sensor at the exit gate produces a positive 1TL pulse whena vehicle leaves the garage.The sequential circuit counts up when a vehicle enters andcounts down when the vehicle leaves the garage.The circuit produces a HIGH 1TL output when the garage isfull. This HIGH output signal is used to illuminate the Fullsign and to close the vehicle entrance gate of garage.The circuit output changes to LOW when an empty spacebecomes available in the garage. . Design and implement the sequential circuit using up/downcounters (e.g. 74193) and logic gates.

 

Do you have a question here? People are more than willing to help if you have a question but won't if you just want them to solve the entire problem.

 

pls check and say whether tis ckt will work..especially down counting

 

No, it won't work properly.

You're trying to clock both the LSB and MSB counters using the same input signals.

You only want the MSB counter to increment or decrement when the LSB counter outputs a carry or borrow.

 

can yo please explain me further

 

Consider the decimal counting system, you only increment one digit at a time...

00, 01, 02, 03, ... , 09, 10

The tens digit is only incremented after you pass 9 in the ones digit. You carry the one from the addition of 9 and 1 and it ends up in the tens digit. Same for digital counters. You only want the second one to increment after the first one produces the carry.

If you increment both at the same time you get 00, 11, 22, 33, ...

 

will this ckt work if the clk inputs for msb counter is taken off..pls reply

 

and also other connections correct.???

 

I gave you a rather large hint with the carry/borrow output suggestion.

Can you figure out what to do with them?

We can't do your homework for you, as that would defeat the purpose of your learning exercise.

 

oh...your hints lead to an asynchronous counter if i am right......is there any way to do it as a synchronous counter

 

Excerpt from the TI datasheet:
"These counters were designed to be cascaded without the need for external circuitry."
Read the rest in the datasheet:
http://focus.ti.com/lit/ds/symlink/sn74ls193.pdf

There will be some minor propagation delay through the IC for the borrow/carry outputs, but you would have that anyway whether the logic were internal or external to the IC itself. In the case of your circuit requirements, it really doesn't matter whether the counters are synchronous or asynchronous.