OK this is my first post here and hope to contribute in the future. Right now hopefully someone here and help me out here.
Ok heres the project im trying to do and the problem Im having.
Idea:
Im trying to make a 7-segment clock using only logic gate and flip flops fully inside a CPLD.
Problem:
So far im doing the ones place for the minutes section of the clock. I got my basic next state equations and the combinatorial logic part built, example for the logic if I put in 1111110, then 0110000 comes out as expected from my equations. The problem lies when I add the flip flips to the logic part. In my set up the first state isnt 0000000 so I have to preset and clear the FF's to get the counter started but that said the FF's cant accept the next value because they are not set to accept the next values due to the preset and clear values set. The FF's present and clear need to be changed to VCC after the first clock edge and stay the way indefinitely. I have been trying to add things to the P/C's pin (where the GND is in the attached pic) but havent been able to get it to work.
Anyone have any ideas on how to fix this? I have one but it would require a whole new design.
I using the standard A,B,....,G as the labeling of the led's
Next State
A B C D E F G | A+ B+ C+ D+ F+ G+
------------------------------------
1 1 1 1 1 1 0 | 0 1 1 0 0 0 0 Zero => One
0 1 1 0 0 0 0 | 1 1 0 1 1 0 1 One => Two
1 1 0 1 1 0 1 | 1 1 1 1 0 0 1 ....
1 1 1 1 0 0 1 | 0 1 1 0 0 1 1
0 1 1 0 0 1 1 | 1 0 1 1 0 1 1
1 0 1 1 0 1 1 | 1 0 1 1 1 1 1
1 0 1 1 1 1 1 | 1 1 1 1 1 1 1 ....
1 1 1 1 1 1 1 | 1 1 1 1 0 1 1 Eight => Nine
1 1 1 1 0 1 1 | 1 1 1 1 1 1 0 Nine => Zero
Ok heres the project im trying to do and the problem Im having.
Idea:
Im trying to make a 7-segment clock using only logic gate and flip flops fully inside a CPLD.
Problem:
So far im doing the ones place for the minutes section of the clock. I got my basic next state equations and the combinatorial logic part built, example for the logic if I put in 1111110, then 0110000 comes out as expected from my equations. The problem lies when I add the flip flips to the logic part. In my set up the first state isnt 0000000 so I have to preset and clear the FF's to get the counter started but that said the FF's cant accept the next value because they are not set to accept the next values due to the preset and clear values set. The FF's present and clear need to be changed to VCC after the first clock edge and stay the way indefinitely. I have been trying to add things to the P/C's pin (where the GND is in the attached pic) but havent been able to get it to work.
Anyone have any ideas on how to fix this? I have one but it would require a whole new design.
I using the standard A,B,....,G as the labeling of the led's
Next State
A B C D E F G | A+ B+ C+ D+ F+ G+
------------------------------------
1 1 1 1 1 1 0 | 0 1 1 0 0 0 0 Zero => One
0 1 1 0 0 0 0 | 1 1 0 1 1 0 1 One => Two
1 1 0 1 1 0 1 | 1 1 1 1 0 0 1 ....
1 1 1 1 0 0 1 | 0 1 1 0 0 1 1
0 1 1 0 0 1 1 | 1 0 1 1 0 1 1
1 0 1 1 0 1 1 | 1 0 1 1 1 1 1
1 0 1 1 1 1 1 | 1 1 1 1 1 1 1 ....
1 1 1 1 1 1 1 | 1 1 1 1 0 1 1 Eight => Nine
1 1 1 1 0 1 1 | 1 1 1 1 1 1 0 Nine => Zero
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