Alright, this ties into my clock, I went ahead and put the design I'd had in my head onto the screen and gave it values, and I was wanting to make sure that it didn't violate any rules of the 555 or anything-
First 555 is a super low frequency, second is audible, so it goes WAAAA________WAAAAA______WAAAA, more or less.

Thanks!

 

How are your RC time base caps going to charge? I don't see any connection to V+.

BTW, you can make a naval yelp signal by ramping the Control input on input on a 555.

 

How are your RC time base caps going to charge? I don't see any connection to V+.

*facepalm
fixed it

BTW, you can make a naval yelp signal by ramping the Control input on input on a 555.

like this?
siren-

Naval yelp-

 

I don't think thats right. The control input is pin 5. It will cause a small percentage change in output frequency if the voltage input to it changes. By putting a voltage ramp on it(large value cap charging perhaps) the output freq of the 555 will rise or fall according to the voltage level.

 

You have both pin 7's (discharge) connected directly to +V.
The discharge pin is an open collector output, and sinks current.
Take a look at the internal schematic of a 555 timer.
Datasheet: http://www.national.com/ds/LM/LM555.pdf
It's on page 1.
Note that pin 7 is internally connected to the collector of Q14, and Q14's emitter is grounded.
If you connect pin 7 directly to +V, you will burn out Q14, and the timer will no longer work properly.
A good "rule of thumb" is to have a minimum of 100 Ohms per volt resistance between pin 7 and +V, which will result in <= 10mA current from +V to pin 7.

You have the high side of C1 connected to the CTRL input of the right-hand 555 timer.
Look at what pin 5 is connected to internally (referring back to the datasheet internal schematic); the base of Q4 (which is actually a comparator input, and is relatively high impedance) and the junction of R3 and R4, two 5k resistors. Note that below R4, Q10's base and R5, another 5k resistor are connected, and the low side of R5 is grounded. The base of Q10 is another high impedance input.

So basically, you have 5k to +v and 10k to ground; the CTRL pin will measure roughly 2/3 of Vcc if nothing else is connected.

On your schematic, looking back to the left 555 timer, you basically have 10k plus whatever P1 is set to between +V and pin 6, or pin 7 and pin 6 (once you fix the +V to pin 7 problem that is).

When power is first applied, C1 would start off discharged, so the 2nd 555 timer would have a low voltage at pin 5. However, C1 would charge rapidly via the internal R3 of the 2nd 555 timer, plus your R1 & P1 to a lesser extent, as they will effectively be in parallel.

When C1 eventually charges to the left-hand 555's threshold value, pin 7 (discharge) goes low, sinking current. Assuming that you have added at least 1.2k resistance between pin 7 and +V, current also flows through P1 and R1 to pin 7. However, the right-hand 555's internal R3 is now effectively in series with P1.

How do you think that C1 will discharge down to 1/3 Vcc?

 

Here is a dual 555 circuit for a warbler.

http://www.physics.mcmaster.ca/electronics/?page=project005.html

 

My Cookbook

 

Here is a dual 555 circuit for a warbler.

http://www.physics.mcmaster.ca/electronics/?page=project005.html

That's another circuit that would have a hard time.
R3 is 22k between C1 and U2's CTRL input. It would have little effect on a bjt 555's output frequency. It might work with a TLC555, as that's a CMOS version, and it's internal divider is three 100k resistors instead of three 5k resistors.

 

You have both pin 7's (discharge) connected directly to +V.
The discharge pin is an open collector output, and sinks current.
Take a look at the internal schematic of a 555 timer.
Datasheet: http://www.national.com/ds/LM/LM555.pdf
It's on page 1.
Note that pin 7 is internally connected to the collector of Q14, and Q14's emitter is grounded.
If you connect pin 7 directly to +V, you will burn out Q14, and the timer will no longer work properly.
A good "rule of thumb" is to have a minimum of 100 Ohms per volt resistance between pin 7 and +V, which will result in <= 10mA current from +V to pin 7.

GAH!!
This is why I shouldn't schematic at midnight
fixed it

You have the high side of C1 connected to the CTRL input of the right-hand 555 timer.
Look at what pin 5 is connected to internally (referring back to the datasheet internal schematic); the base of Q4 (which is actually a comparator input, and is relatively high impedance) and the junction of R3 and R4, two 5k resistors. Note that below R4, Q10's base and R5, another 5k resistor are connected, and the low side of R5 is grounded. The base of Q10 is another high impedance input.

So basically, you have 5k to +v and 10k to ground; the CTRL pin will measure roughly 2/3 of Vcc if nothing else is connected.

On your schematic, looking back to the left 555 timer, you basically have 10k plus whatever P1 is set to between +V and pin 6, or pin 7 and pin 6 (once you fix the +V to pin 7 problem that is).

When power is first applied, C1 would start off discharged, so the 2nd 555 timer would have a low voltage at pin 5. However, C1 would charge rapidly via the internal R3 of the 2nd 555 timer, plus your R1 & P1 to a lesser extent, as they will effectively be in parallel.

When C1 eventually charges to the left-hand 555's threshold value, pin 7 (discharge) goes low, sinking current. Assuming that you have added at least 1.2k resistance between pin 7 and +V, current also flows through P1 and R1 to pin 7. However, the right-hand 555's internal R3 is now effectively in series with P1.

How do you think that C1 will discharge down to 1/3 Vcc?

OK, thanks, that makes sense, I was just trying to understand what CDRIVE was saying...

I really don't care about the yelp/siren, the standard alarm of my first post is my personal preference.

Also, I was thinking, what would be the best way to control volume?

 

GAH!!
This is why I shouldn't schematic at midnight

Derp, derp... been there, done that...

Also, I was thinking, what would be the best way to control volume?

A well-tossed shoe can be quite effective. Once.

You could try various fixed resistors in series with the speaker for a cheap solution; probably in the range of 10 to 100 Ohms. You want it loud enough to wake you up, but not overly annoying, or when you're rudely awakened you might grab the nearest shoe...

 

so a 100 ohm pot should work nicely?

 

 

Beware that a typical resistive pot will burn up if you set the resistance too low at one end when you have a good deal of current. You can place a small resistor in series with it to prevent that from occurring.

 

OK, thanks, that makes sense, I was just trying to understand what CDRIVE was saying...

Ha, I never suggested driving the Control input of U2 directly or through a resistor from the the RC timer network of U1. A hi input Z buffer is required.

Also, I was thinking, what would be the best way to control volume?

How about a wire wound pot?

 

Alright, just breadboarded it and after playing with the resistors it works great!
Now I just need to order some parts so I can stop linking pots together

Heres the final schematic, I also updated the first post

 

Does this look right for a piezo version, or do I still need the small resistor is series?

 

You don't need the resistor.

 

You will want the same configuration I showed for the speaker. The volume control will not be linear (I think a logerathmic pot will work for that), but it will be adjustable.

 

Wait, is it essential that the other side of the pot be grounded?

 

If you want it to work right, yes. It is a variable voltage divider. The signal can go from nothing to full volume. Use a 1KΩ variable here.

If the variable is in series it will sort of work. However, with a pizeo speaker (with its high impedance) you might have trouble telling the difference.