50/60Hz Frequency conversion using PIC

Discussion in 'The Projects Forum' started by eblc1388, Jul 4, 2009.

  1. eblc1388

    eblc1388 Thread Starter Senior Member

    Nov 28, 2008
    For electric clock using synchronous motor designed for the other frequency vs local mains frequency, some form of frequency conversion is required.

    It is often not satisfactory to use just a crystal oscillator as one can expect timing error of about 1~4 minute per month, with the changing of ambient room temperature. An AC connected clock will do much better in long term period of months or year as the power company often undertake to correct for any timing error between an AC powered clock and an accurate time source by varying system frequency to compensate.

    In simple term, the converted frequency must be somehow related/locked to the mains frequency and the clock powered by this frequency will keep time fine as any other clock.

    There are many possibilities:

    A. using a single 8-pin PIC - By eblc1388

    1. single chip solution, works also for 60Hz into 50Hz
    2. standalone 50Hz or 60Hz standard frequency output, crystal accuracy
    3. no adjustment required
    4. software ensure exact cycles tally. e.g 600 cycle of 60Hz vs 500 cycles of 50Hz

    YouTube: 50/60Hz Frequency Conversion Using PIC

    B. Phase locked loop & 600Hz to 60Hz direct conversion - By eblc1388

    1. use x6 PLL to get 600Hz square wave from 100Hz
    2. use 5-stage ring counter to build staircase waveform(see image below)
    3. pass staircase waveform to RC filter to get 60Hz sine wave

    More information here: post#32

    Forum Post#32: frequency multiplier

    C. Harmonic method - By Rod Elliott

    1. Picking out the sixth harmonic of 100Hz (50Hz fullwave rectified) signal
    2. amplified and squaring the signal to get 600Hz square wave
    3. divide by 10 to get 60Hz square wave
    4. pass into active filter to remove all higher harmonic leaving fundamental 60Hz sine wave

    The link is here: Frequency Changer for Low Voltage Synchronous Clocks

    The bottom trace is the combined waveform output of the five stage ring counter and the top trace signal after RC filter, mentioned in option B above.


    Attached Files:

  2. THE_RB

    THE_RB AAC Fanatic!

    Feb 11, 2008
    Really nice! I've been watching the frequency conversion threads. :)

    Here is some minimalist math to add to the list, it converts 120Hz to 1200Hz, then generates 100Hz locked to the orig 120Hz. For use in clocks/timers etc that display hundredths of seconds but are still locked to 60Hz mains.

    It will also convert 100Hz->120Hz, 50->60, 60->50 etc with zero-error using the very simplest of math (a bresenham accumulator system) and just 2 variables;

    	// C code for low-jitter generation of 100Hz from 120Hz mains
    	// PIC code, 4MHz xtal, TMR1 at 1:8 prescale 
    	// uses 2 variables;
    	//   unsigned int bres
    	//   unsigned char pulse
    	// wait here for 120Hz pulse
    	// now generate 10 "fake" pulses, each is "1200Hz"
    	// which is 833uS. PIC 1Mhz xtal, TMR1 1:8 prescale,
    	// we use TMR1L period of 104 = 832uS 
    	// note! TMR1L loop is also another zero-error system
    	// that we keep subtracting 104 from while retaining
    	// its internal error.
    	pulse = 10;		// make 10 "fake" pulses
    	TMR1L = 0;		// make first pulse immediately
    		// wait here for fake 1200Hz pulse	
    		// now fix TMR1L and do the main bres event
    		TMR1L -= 104;	// subtract 1/1200th of a second
    		bres += 100;
    		if(bres >= 1200)	// if 100th sec reached!
    			bres -= 1200;
    			do_100th_event();	// update clock, etc
    		// subract a pulse, see if 10 done yet
    	// gets here after 10 "fake" 1200Hz pulses,
    	// need to detect a real 120Hz pulse, then
    	// do it all again!
    	goto start;
    It can be seen halfway down the page under "Advanced bresenham timing techniques" on this page;
    and there's more code on that page for generating exact 1 second periods for clock use etc.
  3. eblc1388

    eblc1388 Thread Starter Senior Member

    Nov 28, 2008
    Well in digital clocking one can wait until the correct moment to do things, or puts out all the required pulses within 10% of the start of the whole interval. The counter that accept the clocking pulses would not care.

    In analogue world, the AC sine waveform cannot be put on hold, and one cannot have 3/4 or 1.25 cycles of a waveform and then suddenly starts a new one.
  4. THE_RB

    THE_RB AAC Fanatic!

    Feb 11, 2008
    I agree. That is exactly the problem that the code I posted fixes. It acts as a mathematical PLL.

    That is why it is in the advanced section of the page and labeled as "low jitter".
Similar Threads
Forum Title Date
The Projects Forum Alternative for weird crystal frequency Saturday at 7:51 AM
The Projects Forum How to determine frequency? Mar 10, 2015
The Projects Forum Induction heater - question about resonance frequency for LC filter design Mar 9, 2015
The Projects Forum AD9850 frequency generator (Or dds vfo) Mar 8, 2015
The Projects Forum Change Frequency on RF Receiver Feb 21, 2015

Share This Page