help please!!! I have a project to make this schematic but i'm a little stuck......any advice/help would be GREAT! I'm using Xilinx or tkgate to do this.... 1a Design a 4-to-1 multiplexor with a 2-bit selector. 1b Using the design from 1.1a, build a 4-to-1 multiplexor that uses 8-bit buses instead of the single bits in 1.1a. thanks!!!