Hi, just like some feedback if I've tackled a problem from my homework from the right angle in my introductory computer engineering unit.
We've been given the problem to design a 4-bit even-parity generator using only AND, OR and NOT gates.
The logic diagram I have come up with is:
And here is my truth table:
Does this look correct? Any help will be appreciated! This is my first assignment, and we have to implement it on a breadboard in class and I'm a little hesitant at how many gates my circuit requires so I have a feeling I'm on the wrong path.
We've been given the problem to design a 4-bit even-parity generator using only AND, OR and NOT gates.
The logic diagram I have come up with is:
And here is my truth table:
Does this look correct? Any help will be appreciated! This is my first assignment, and we have to implement it on a breadboard in class and I'm a little hesitant at how many gates my circuit requires so I have a feeling I'm on the wrong path.