Hi.

too long, didn't read: please check the circuit below for any failures and provide feedback on overall implementation

I've started a little fun project to build a MCU-controlled brushless motor driver. This is basically three "halfs" of a H-bridge. I have the schematic, but I'd appreciate if you guys checked it for obvious flaws since this is all new to me.
I do not consider using a single-chip driver, I need the experience I get doing this project.

Design considerations

• The motor is from a WD drive, 3-coil with common ground (wye winding according to wikipedia), singe coil resistance of about 0.9 Ohm; will run at 2 A @ 12 v (resistor added to limit current)
• The power supply is an ATX PSU, 5v for logic, 12v for the motor

Component choice is limited; here's what I've come up so far:

• IRF7319 N + P channel FET
• 2N4401 NPN transistor for high side driver and short protection
• 74HC08D quad AND gate for short protection logic
• 1N4148 diode for short protection
• ATmega48 for control

Just one note on the circuit: I specifically want hardware short protection, even though this thing is MCU-controlled.

The short protection works as follows: the opening signals for high and low sides also go to the AND gate, and if both are present, the gate opens a transistor which pulls the signals down.

 

Have a read through TI's
Design And Application Guide For High Speed MOSFET Gate Drive Circuits:
http://www.ti.com/lit/ml/slup169/slup169.pdf

Even when your driver can supply the same amount of current to charge or drain a gate, the turn-off time will be longer than the turn-on time.

Your turn-off times will be slow, as you have >22nC gate charge, and your gate discharge paths have a 10k resistor in series with them. In some ways, having a slow turn-off will help to reduce peak EMF spikes, but your times will be so slow that power dissipation in the MOSFETs will be excessive.

Forget your AND gate logic for preventing shorts; what you've done is create an oscillator, and your short protection circuit is also shorting out the ATMega outputs when activated. Work on speeding up your gate charge/discharge times.

If you fail to prevent shoot-through in your code, you will most likely wind up with a MOSFET gate shorted to its' drain, and the other side of the half-bridge will rapidly burn up afterwards.

 

Thanks for the input, SgtWookie. While I'm reading the article and redesigning my driver circuits, I have a question regarding short protection. What if I implement a simple logic function for that purpose?

HD = HS & ~LS
LD = ~HS & LS

where HD/LD are gate driver outputs and HS/LS are gate driver inputs for high/low side accordingly

Upd. I will add here what's I've learned from the guide.

• No gate resistor, since there's no source inductance listed in the datasheet, and achieves fater turn-on
• Failed to calculate drive bypass cap, some parameters not understood
  

  Dmax is the maximum duty cycle of the driver while the input can stay high, Fdrv is the operating frequency of the driver

 

Continuing my previous post, I do not understand how the "totem pole" low side driver works, since NPN transistors require base current to flow "in", and PNP to flow "out". Explanation, please?

I'd use this driver design for both low and high (with inverting transistor) sides.

 

How are you synchronizing you on-off times to the rotor? You need either hall effect sensors or some way of sensing the current with respect to the rotor position. Without a feedback of some kind the rotor magnets and coils will not stay in-sync.

 

How are you synchronizing you on-off times to the rotor? You need either hall effect sensors or some way of sensing the current with respect to the rotor position. Without a feedback of some kind the rotor magnets and coils will not stay in-sync.

I hope to achieve rotation by simply going through a sequence of energizing coils with increasing frequency. If the power system works, I may be able to use an optic sensor or the controller's ADC for feedback later.

 

That may or may not work with no load. But if a load is added to the motor I wouldn't count on it.

 

That may or may not work with no load. But if a load is added to the motor I wouldn't count on it.

I need to see if the power circuitry works at all first, surely without any load on the motor. I will add connectors for unused MCU pins to the PCB and extend it with some feedback later.

By the way, I've come up with a driver schematic. The document which SgtWookie referenced was somewhat hard to understand, so I pretty much copied the totem setup described there.

 

Thanks for the input, SgtWookie. While I'm reading the article and redesigning my driver circuits, I have a question regarding short protection. What if I implement a simple logic function for that purpose?

HD = HS & ~LS
LD = ~HS & LS

where HD/LD are gate driver outputs and HS/LS are gate driver inputs for high/low side accordingly

What would be the point in doing that, when you already have control of the uC's HS & LS outputs? Just make certain that you don't have both outputs high simultaneously, and that you use a delay between turning one side off, and the other side on.

Upd. I will add here what's I've learned from the guide.

• No gate resistor, since there's no source inductance listed in the datasheet, and achieves fater turn-on

Not a very good plan. Your traces will have inductance, depending upon their length and width.

• Failed to calculate drive bypass cap, some parameters not understood
  

Dmax and Fdrv apply when you are using a gate driver IC like an IR2110.

 

Continuing my previous post, I do not understand how the "totem pole" low side driver works, since NPN transistors require base current to flow "in", and PNP to flow "out". Explanation, please?

I'd use this driver design for both low and high (with inverting transistor) sides.

"Totem pole" drivers like this one use an NPN and a PNP transistor both connected as voltage followers/common collector. Connected like this, the voltage at the emitter follows the voltage input at the base, with an offset of ~0.6v under light load to perhaps 1v under heavy load. The gain of the transistor multiplies the current input on the base and outputs the amplified current on the emitter. The transistors' response is extremely fast in this configuration. Current is amplified instead of voltage, as in the common emitter configuration.

The disadvantage of using a totem pole configuration is that your maximum output voltage swing is reduced by ~0.6v on the high side, and increased by ~0.6v on the low side.

You could use a totem pole driver for both the high and low sides of the half-H bridges if your bridge supply will be the same voltage as the Vcc/Vdd for the uC. If the bridge supply will be higher voltage than the uC Vcc/Vdd, you will need a method to obtain the voltage offset for the high side, or you will not be able to turn the P-ch MOSFETs off.

 

I know you want to do this with a micro, but I don't really think you are understanding how the motors and drivers work. Even though this is an analog chip set, the information about how it and the motor works will help you to understand more about the motors workings and what is needed. http://www.onsemi.com/pub_link/Collateral/AN1046-D.PDF

http://ww1.microchip.com/downloads/en/appnotes/00857a.pdf

 

By the way, I've come up with a driver schematic. The document which SgtWookie referenced was somewhat hard to understand, so I pretty much copied the totem setup described there.

Your schematic from the above reply:
http://forum.allaboutcircuits.com/attachment.php?attachmentid=44177&d=1341527364
has problems.

You have the collectors of Q2 and Q3 grounded. These are NPN's, and the collectors need to be connected to +12v instead.
Q4 and Q5 must have their collectors grounded instead of being connected to +12v.

I suggest that you replace C6 & C7 with 0.1uF bypass caps, poly metal film or ceramic. You should also parallel them with larger caps. Keep in mind that the gates will be charged and discharged primarily from these caps, as they are the closest things to the emitters/collectors of the drivers.

You have Q6 inverting the signal to the low side; it should be to the high side instead, and R4 should have it's high side connected to +12v. That way, you have a way to get the driver input up to +12v and down to ground.

R1 and R3 are too low in value. You really shouldn't go below about 220 Ohms, or the load on your uC's I/O pins will be excessive.

Decrease R4 to 1.2k.

 

What would be the point in doing that, when you already have control of the uC's HS & LS outputs? Just make certain that you don't have both outputs high simultaneously, and that you use a delay between turning one side off, and the other side on.

Not a very good plan. Your traces will have inductance, depending upon their length and width.

The thing I was worried about is the MCU reset sequence, but I've checked the datasheet and it says all I/O pins are configured as outputs on reset, so no more worries here.

I've had problems figuring out some of the equation parameters, but will a Rgate of 5 Ω suffice?

I have also reworked the driver circuit, with some help. This drives it's output to Vcc/GND according to a logic level signal.

 

And here is the complete schematic so far.

 

Gate resistors usually run from a few Ohms to ~30 Ohms or so. 10 to 20 Ohms would work OK for you.

In your new schematic of just the driver portion, you are now using the transistors as saturated switches instead of voltage followers. This will slow the response time of the transistors, and you will have "shoot-through" (both transistors on, shorting the supply) when changing states, as you have no provisions for avoiding the shoot-thru. R13 will need to be rated for >= 2.3 Watts, as it will have 192mA current flowing through it, once R14 would be properly sized, and a better choice made for Q6, as a 2N3904's Vce will be excessive at 192mA.

The generic formula for calculating the value of a typical transistors' base resistor when using the transistor as a saturated switch, is:
Rb = (Vin - Vbe) / (Ic / 10)
where:
Rb = the required value of the base resistor in Ohms.
Vin = the voltage on the side of the resistor away from the base, as measured from the transistors' emitter.
Vbe = the voltage on the base as measured from the emitter when the collector current is at the desired value.
Ic = the desired collector current.

You want 192mA for Ic, you're using 4.2v for Vin, and we'll just use 1v for Vbe for the moment.

Rb = (4.2 - 1) / (0.192/10) = 3.2 / 0.0192 ~= 166.6667 Ohms. Looking at a table of standard resistance values:
http://www.logwell.com/tech/components/resistor_values.html (bookmark this page!)
we find that 160 Ohms is the closest standard E12/E24 value that is <= to 166.6667 Ohms.

If you look up a datasheet for the 2N3904, you will find that it is rated for 200mA collector current maximum; however the general "rule of thumb" is to de-rate the transistors' maximum current rating by 50%; and 192mA exceeds 100mA by a considerable amount.

A couple of transistors that are very common, cheap and easy to get that have sufficient Ic specs are the 2N4401/PN4401 and the 2N2222/MPS2222. Their complements are the 2N/PN4403 and the 2N2907, respectively.

It also seems that your R11 and R12 are sized rather high. 1.1k would be about right for a collector current of 100mA

 

This will slow the response time of the transistors, and you will have "shoot-through" (both transistors on, shorting the supply) when changing states, as you have no provisions for avoiding the shoot-thru.

Will a pause between state change work, or does it have to be in hardware? The pause can be done easily enough with the MCU, and there are timings in transistor datasheets (see below).

Now to explain the resistor choice.
This transistor configuration was suggested to me in an IRC channel. During the discussion it was pointed out that there appears to be a voltage divider when Q6 (the leftmost) is open, so the resistor values were selected to ensure the bases of rightmost transistors would reach saturation voltage.

The particular transistor models in the diagram are just what the simulator has, disregard them. The actual selection I've made are MMBT2222 and MMBT2907AL both rated 600 mA continous collector current.

Now that I've explained things, comes a question: will this circuit work if I increase the values of R11/12/13 while keeping them in the same ratio?

Selecting the base resistors of 10kΩ and the pull-up of 330Ω gets the current via leftmost transistor down to 60mA in my simulation, providing the same voltage and about 1mA of current to the rightmost transistors' bases.

And thanks for the resistor chart. I never thought that resistor values were standardized (although that would be logical), and would look through supplier's catalogs for closest values

 

You'd updated the schematic on the circuitlab site, which made my examples that refer to your schematic look incorrect. This will be confusing to other people looking at the thread. In the future, it would be better if you attached an image to your post on this board, so that doesn't happen.

Will a pause between state change work, or does it have to be in hardware? The pause can be done easily enough with the MCU, and there are timings in transistor datasheets (see below).

I'm not sure what you mean. Currently, there are basically three states:
1) The gate is high.
2) The gate is low.
3) The gate is transitioning between high and low, both transistors are conducting which will short out the power supply, and the MOSFET is dissipating power as heat because it is resistive rather than on or off.

If you paused it during the transition, it would make the problem much worse.

Now to explain the resistor choice.
This transistor configuration was suggested to me in an IRC channel. During the discussion it was pointed out that there appears to be a voltage divider when Q6 (the leftmost) is open, so the resistor values were selected to ensure the bases of rightmost transistors would reach saturation voltage.

If you go back to the voltage follower/common collector configuration, those problems go away. You would no longer need R11 nor R12.

The particular transistor models in the diagram are just what the simulator has, disregard them. The actual selection I've made are MMBT2222 and MMBT2907AL both rated 600 mA continous collector current.

Keep in mind that those have a much lower mW rating than the TO-92 package has (350mW vs 625mW). You will need to be careful to avoid stressing them.

Now that I've explained things, comes a question: will this circuit work if I increase the values of R11/12/13 while keeping them in the same ratio?

You will increase the amount of time that the MOSFETs stay in transition, which will increase their power dissipation a great deal. It is very doubtful that you will be able to prevent them from melting down.

Selecting the base resistors of 10kΩ and the pull-up of 330Ω gets the current via leftmost transistor down to 60mA in my simulation, providing the same voltage and about 1mA of current to the rightmost transistors' bases.

You need the charging and discharging of the MOSFET gates to occur very quickly.

And thanks for the resistor chart. I never thought that resistor values were standardized (although that would be logical), and would look through supplier's catalogs for closest values

You're welcome.
Although it's overkill for this project, you might find this program handy down the road:
http://forum.allaboutcircuits.com/showthread.php?t=12878&page=5
Look at the last post on that page.

 

Sorry about the schematic, I reverted it to it's previous state now.

I also seem to have misunderstood you previous post, I thought about shoot-through in FETs, not in the driver.
Is there a way to prevent the shoot-through when transistors are in "switch" configuration?

From what little I understand, I actually want them that way to conduct maximum current in/out the FET gate and thus charge/discharge it faster.

You will increase the amount of time that the MOSFETs stay in transition, which will increase their power dissipation a great deal. It is very doubtful that you will be able to prevent them from melting down.

I'm trying to understand why that would happen. Is that because the driver transistors will switch more slowly?

All this makes me think about using an integrated FET driver

 

Sorry about the schematic, I reverted it to it's previous state now.

I also seem to have misunderstood you previous post, I thought about shoot-through in FETs, not in the driver.

I see.

Is there a way to prevent the shoot-through when transistors are in "switch" configuration?

Not without making it more complex.
You'll still have the disadvantage of the MOSFET transitions being slower as well, because it will take the driver transistors awhile to come out of saturation. The more deeply that the transistors are saturated, the longer it takes to come out of saturation.

In common collector/emitter follower configuration, the transistors are not saturated, so there is no recovery from saturation, and the response is much faster.

From what little I understand, I actually want them that way to conduct maximum current in/out the FET gate and thus charge/discharge it faster.

That is the idea, except you need the gate resistor to control the ringing on the gate.

"You will increase the amount of time that the MOSFETs stay in transition, which will increase their power dissipation a great deal. It is very doubtful that you will be able to prevent them from melting down."

I'm trying to understand why that would happen. Is that because the driver transistors will switch more slowly?

Yes.

All this makes me think about using an integrated FET driver

There are a lot of features packed in an integrated FET driver. One of the many benefits is that your gate charge path will be much shorter than if you used discrete components, meaning less inductance on the path, so you can use a smaller gate resistor. Reliability is improved due to the lower parts count. You save on PCB real estate. Dedicated gate driver ICs have much higher current capacity than discrete components.

I suggest that you go to Linear Technology's website and download LTSpice IV (or just Google "LTSpice download"); it is free and it is quite good. While Circuitlab is interesting and not without merit (it does have some handy features), the component library selection is very limited, and there are no provisions for adding more components. LTSpice is more oriented towards linear applications rather than digital, but there are some 74hc and cd4000 series IC's available in libraries on the Yahoo! LTSpice users' group (which you should join; simply sign up for a free Yahoo! account, and join the group.)

 

There are a lot of features packed in an integrated FET driver. One of the many benefits is that your gate charge path will be much shorter than if you used discrete components, meaning less inductance on the path, so you can use a smaller gate resistor. Reliability is improved due to the lower parts count. You save on PCB real estate. Dedicated gate driver ICs have much higher current capacity than discrete components.

Okay, integrated drivers it is. What do you think about IR2110SPBF for the driver and FDS8958A n+p FET?
I'm thinking of using PWM on the SD (shutdown) input for speed control.

The to-be PCB with discrete components was getting somewhat larger than 100x100mm, and obviously hard to assemble with lots of small components (this has another point, I need the soldering experience).

Oh, and can you recommend a book or other knowledge source which would focus on semicunductors in power applications? (or at least have a section on this)
I want to compensate whatever I'm still missing having not designed a FET driver on my own. This is so much more complex than digital circuits.

And yes, I got LTspice just recently because I was unable to properly simulate a Colpitts oscillator in Circuitlab or Qucs.