3 bit up/down counter using positive edge triggering clock pulses with T-flip flop

Discussion in 'Homework Help' started by avan93, Mar 3, 2014.

  1. avan93

    Thread Starter New Member

    Oct 29, 2013
    5
    0
    My assignment is design a 3 bit up/down counter using positive edge triggering clock pulses with T-flip flop.Is this correct??

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  2. tshuck

    Well-Known Member

    Oct 18, 2012
    3,531
    675
    Have you tried simulating it?

    The great thing about getting results in engineering is being able to rationalize your answer. In this case, run through the logic and verify it does what a 3-bit, positive edge-triggered counter does.
     
  3. WBahn

    Moderator

    Mar 31, 2012
    17,757
    4,800
    With two input signals you have four possible control states. While what it should do in two (and arguably three) of them is fairly obvious, what it should do in the fourth is not. So before anyone, yourself included, can tell if the design is correct you have to first clearly specify what the design is supposed to do.
     
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