2 Stage BJT Amplifier (Design/Analysis)

Discussion in 'Homework Help' started by bratva, Apr 20, 2016.

  1. bratva

    Thread Starter New Member

    Apr 20, 2016
    Hi all.
    (I've been self-studying Electronics as a hobby.
    This website is extremely helpful. Thank you!)

    I require help designing and analyzing the following using the parameters given below:

    Stage 1 - (Potential Divider Biased) Common Emitter: 2mA ≤ Ic(q) ≤ 15mA
    Av (CE) = 2 ≤ |Av| ≤ 6 (with RL connected)

    Stage 2 - (Potential Divider Biased) Common Collector: 5mA ≤ Ic(q) ≤ 10mA
    Av (CC) = 1 (approximately)

    *Also, RL = RC
    *Both Stages must be mid-point biased
    *Power Supply = +15V
  2. Bordodynov

    Active Member

    May 20, 2015
    You need to know the input impedance. For example> 1k.
    You also need to know the size of the load (the number). Conditions Rc = RL is not rational. The emitter follower reduces the output resistance that allows the use of low-resistance load. Those. the collector resistance of the first stage may be significantly greater than the load. Simply put the input impedance of the emitter follower in the (beta + 1) times its total load. If this is not homework, I can give an example of the construction of the circuit without the base divider resistors (with a minimum of elements and overall feedback DC). Give only the numerical values of which I wrote at the beginning.
    Last edited: Apr 21, 2016
  3. MrAl

    Well-Known Member

    Jun 17, 2014

    Hello and welcome,

    I am happy to hear about people who are new or even old to electronics but want to learn more. I'll help all i can and i am sure there are lots of other people here who will too.

    To start, did you ever design a SINGLE stage transistor amplifier? That would be a prerequisite. So to start this task, you would first design the first stage which is the emitter follower. Do you know how to begin with that?

    Also, what kind of math have you done in the past?
    Algebra, trig, geometry, etc.