I know that a 2 bit up down counter looks like the attachment.

Now I am suppose to add an enable input that determines whether the counter is on or off. Where if E=0 the counter is disabled and remains at is present count even though clock pulses are applied to flip flops. Then if E=1 the counter is enabled and a second input, x, determines the direction of the count. If x=1 the circuit counts upward (00,01,10,11) and count repeats. If x=0 the circuit counts downward and count repeats.
I am not allowed to disable clock with E.

I don't understand how to implement an enable.
Can anyone help me?

 

Add an AND gate between the output of the NOR and 2ed f/f JK inputs. The other AND input connects to JK of the 1st f/f. Pull this node low to disable.

 

There is not a NOR gate. There is an OR and a NOT. Unless I was wrong on how to draw a regular up/down counter. And I'm not quiet sure where you are saying to insert the AND gates. Can you tell me what are the inputs and where the outputs go, to clear this up? Thank you.

 

Hello adonaldson:

You are correct. is an OR gate.
that's where you JohnInTX tells you to insert the AND gate.

Take a look at the attached image.

knowing the state table of the JK Flip-Flop You would have defined your requirement.

 

Attached is what I meant.
PS Not putting on airs w/Eagle but I couldn't get a decent scan of your jpg.

Have fun!

EDIT: Nice, Mr Carlos. That will teach me to hit 'refresh' before dragging out the big guns!