16f683 timer question

Discussion in 'Embedded Systems and Microcontrollers' started by blackmamba, Jan 8, 2010.

  1. blackmamba

    Thread Starter New Member

    Dec 4, 2009
    16
    0
    Thank you all so much for the great responses to my dumb questions. I appreciate it.

    Info:
    I need to measure the time interval between two rising edges using Timer1 with Internal clock.With 1MHz Fosc, Fosc/4 timer clock with 1:8 prescaler gives 31250Hz. The signal being measured is anywhere between 50-60Hz. Using CCP capture, I am measuring every 16th rising edge to make things easier and then dividing by 16 to get desired value.

    Question: How is the value captured from Timer register converted to seconds?
    The value should be between 0-65355, but what is the actual interpretation of this?

    I really appreciate the help.
     
  2. Markd77

    Senior Member

    Sep 7, 2009
    2,803
    594
    It looks like you are measuring the number of 1/31250 second intervals for one cycle of the signal.
    Divide by 31250 to get the number of seconds per cycle (should be around 0.02 seconds for 50Hz).
    1/(time in seconds) = frequency in Hz
     
  3. Boo

    Member

    Oct 27, 2009
    40
    0
    31250Hz means that timer1 will overflow at about 1hz (its a 16 bit counter).
    Since timer 1 is counting up at 32uS. 50-60Hz is 20ms. This means the CPRL registers would hold about .02 / .000032 = 625.
     
  4. Boo

    Member

    Oct 27, 2009
    40
    0
    1/ 31250Hz = 32uS
     
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