16bit * 16bit multiplier

Thread Starter

simon0123

Joined Feb 25, 2010
2
i am designing a 16bit * 16bit multiplier by using Radix 4 algorithm. The structure required is pipeline structure. i want to know how to design a circuit to perform 2 bit left shifting which is used to control multiplexer output.
Can anyone teach me how to design a 2 bit left shifting ciruit.
 

Papabravo

Joined Feb 24, 2006
21,157
Consider two registers in your pileline, each of length n-bits. Register A is before Register B, and you want Register B to be equal to the value in Register A shifted left by two bits. A(0),...,A(n-1) are the outputs of register A and dB(0),...,dB(n-1) are the inputs of Register B. Wire the inputs of register B as follows:
Rich (BB code):
dB(0) = 0 ;
dB(1) = 0 ;
dB(2) = A(0) ;
dB(m) = A(m-2) ; for m in {3,...,n-1}
After every clock cycle the output of Register B will be equal to the value in Register A shifted left by two bits. I have no clue what you want to do with bits A(n-1) and A(n-2). In this scheme they have nowhere to go.
 

Thread Starter

simon0123

Joined Feb 25, 2010
2
sorry , i make a mistake, it should be shifted to right instead of left
but how can i implement it by using hardware? eg DFF , LGOIC GATE
 
Last edited:

Papabravo

Joined Feb 24, 2006
21,157
I told you how to do it using hardware. If you want to shift to the right, you wire the two registers as follows:
Rich (BB code):
discard A(0) ;
discard A(1)
dB(0)   = A(2) ;
dB(1)   = A(3) ;
dB(n-3) = A(n-1)
dB(n-2) = 0 ;
dB(n-1) = 0 ;
You do understand what I just described -- don't you?
 
Top