So you guys know I've been trying to make a PAL video generator.
My first card didn't work. The final signals were all crazy and disorderly and I couldn't figure out why.
I disassembled the circuit and tried to get down to the first problem that occurs and I have found it!
I am using a 12 stage ripple counter to do the counting, and then using logic gates to compare the outputs and so on.
However, when I try to do logic with the last stages, that is, bits 12, 11, 10 and 9, errors occur and the logic goes crazy. The outputs are no longer in a single state.
However the first stages, 1, 2, 3 and 4 do work and the logic is clean.
Why would the last stages fail like this? Incidently, I saw a video generation circuit schematic, where they also use counters, but their counters are all 4 bits IC's, where the last bit of one feeds into the clock of the next. Why ?
Please help.
My first card didn't work. The final signals were all crazy and disorderly and I couldn't figure out why.
I disassembled the circuit and tried to get down to the first problem that occurs and I have found it!
I am using a 12 stage ripple counter to do the counting, and then using logic gates to compare the outputs and so on.
However, when I try to do logic with the last stages, that is, bits 12, 11, 10 and 9, errors occur and the logic goes crazy. The outputs are no longer in a single state.
However the first stages, 1, 2, 3 and 4 do work and the logic is clean.
Why would the last stages fail like this? Incidently, I saw a video generation circuit schematic, where they also use counters, but their counters are all 4 bits IC's, where the last bit of one feeds into the clock of the next. Why ?
Please help.