Flip Flops

Thread Starter

8-bit

Joined Jan 7, 2014
27
I just wondered if somebody could explain how these circuits work and how the current moves thorough them as I am struggling to work it out. :confused:

Thanks :)
 

Papabravo

Joined Feb 24, 2006
21,157
A Flip-flop is a circuit with two stable states. It uses feedback to monitor the state of the inputs and the current state of the outputs. It is also a synchronous circuit in that a 'clock' is used to determine when changes can take place. So, in simple terms, just before the clock edge (rising or falling) the current inputs and current output are sampled and just after the clock edge the output will change or not depending on the results of the sample.

In order to look at voltages and currents it would help to have a circuit for discussion. The LTspice package has a large number of example circuits that may help in this instance. You can simulate them and discover for yourself.
 

MrChips

Joined Oct 2, 2009
30,705
A flip-flop is a logic circuit that has two stable states, 0 and 1, or LOW and HIGH. This is also called a bi-stable.

This can be created by a digital gate using positive feedback. If the output is fed back to the input the input is reinforced by the output.

If the output is HIGH the input will be HIGH and will stay HIGH.
If the output is LOW the input will be LOW and will stay LOW.

This model uses a voltage model, not current, i.e. the LOW and HIGH levels refer to voltage levels.

The simplest flip-flop consists of two NOT gates wired in a loop, output of one gate connected to input of the other gate.

Here is a simple flip-flop using two NOT gates:

 

crutschow

Joined Mar 14, 2008
34,280
A flip-flop is a logic circuit that has two stable states, 0 and 1, or LOW and HIGH. This is also called a bi-stable.

This can be created by a digital gate using positive feedback. If the output is fed back to the input the input is reinforced by the output.

If the output is HIGH the input will be HIGH and will stay HIGH.
If the output is LOW the input will be LOW and will stay LOW.

This model uses a voltage model, not current, i.e. the LOW and HIGH levels refer to voltage levels.

The simplest flip-flop consists of two NOT gates wired in a loop, output of one gate connected to input of the other gate.

Here is a simple flip-flop using two NOT gates:

It's typical in the data sheet descriptions to use the term latch for that circuit, which is an asynchronous circuit (not clocked) to differentiate if from a synchronous (clocked) latch which is referenced there as a flip-flip. I know that both types of devices can be called latches or flip-flops, but I think it simplifies the discussion and there usage if they are referred to by different labels. ;)
 

MrChips

Joined Oct 2, 2009
30,705
True.

What I show students is the development of a clocked flip-flop starting from a simple S-R latch.

So the lesson begins with two NOT gates, followed by two NAND gates.

The next step in the development is a clocked S-R latch using four NAND gates.

This development progresses step by step ending with the classic master-slave J-K flip-flop.
 
flip flop is generally designed to act as a memory element in synchronous with clock pulses
why do we need this kind of arrangement instead of simple latch is that inputs to so many
processing units are random and we need an action that should be stable at least for one clock cycle so that the processor do not reaches an uncontrollable state.
so many technologies have evolved for design of these flip flops in so many ways like conventional gates c mos logic..
 

WBahn

Joined Mar 31, 2012
29,976
It's typical in the data sheet descriptions to use the term latch for that circuit, which is an asynchronous circuit (not clocked) to differentiate if from a synchronous (clocked) latch which is referenced there as a flip-flip. I know that both types of devices can be called latches or flip-flops, but I think it simplifies the discussion and there usage if they are referred to by different labels. ;)
I agree -- as long as we don't get too in love with the notion that there is a rigid definition. Whenever we hear (or read) someone talking about a "latch" or a "flip flop" we should always do a sanity check and verify what is actually meant. The context usually allows this to be done easily and, with experience, the process becomes automatic and we don't even realize we are doing it.
 

ErnieM

Joined Apr 24, 2011
8,377
It's typical in the data sheet descriptions to use the term latch for that circuit, which is an asynchronous circuit (not clocked) to differentiate if from a synchronous (clocked) latch which is referenced there as a flip-flip. I know that both types of devices can be called latches or flip-flops, but I think it simplifies the discussion and there usage if they are referred to by different labels. ;)
Disagree. Creating your own nomenclature for a device leads to no one knowing what you are talking about.

A flip flop is a single bit storage device, and latch is a synonym for the same thing. There are several options in how to build one: there need not be a clock, or the clock can work on it's level or on it's edge, inputs can be set, clear, preset, preclear, and these inputs can work active high, active low, or just seemingly weird (in the case of the JK flip flop).

The outputs get a bit simpler: there can only be one or two, and they don't have many options, just Data and Not Data.

This is not an explanation of these features, it is just to say there are many many options in how you make a flip flop. About the only thing they all have in common is the two inverters as MrChips drew. No note that some have two of these structures per flip flop.

So when using (or picking out) a device the data sheet must be gone thru with a fine tooth comb to see just how that particular device works.
 

crutschow

Joined Mar 14, 2008
34,280
Disagree. Creating your own nomenclature for a device leads to no one knowing what you are talking about.

.....................
I'm not creating my own nomenclature, I'm using what is commonly done in the industry. So you disagree that most data sheets use the term latch for the asynchronous circuit and flip-flop for the synchronous version?
 

WBahn

Joined Mar 31, 2012
29,976
I'm not creating my own nomenclature, I'm using what is commonly done in the industry. So you disagree that most data sheets use the term latch for the asynchronous circuit and flip-flop for the synchronous version?
You keep talking about with or without a clock. What do you think it should be called if it has a level-triggered clock input? Is this synchronous or asynchronous? Should it be called a latch, or a flip-flop?
 

WBahn

Joined Mar 31, 2012
29,976
Hello,

The following page was found in the internet archive:
http://web.archive.org/web/20100109...wichill.edu.bb/cmp/online/P10F/flip-flops.htm

It shows you a couple of flip-flop types.

Bertus
Notice that it ignores the case of the simple case of crosscoupled NAND or NOR gates. These don't have a clock at all and are called latches by some and flip-flops by others.

It's safest thing is to simply not assume that the particular term used is telling you anything other than that it is a circuit with memory.
 

Brownout

Joined Jan 10, 2012
2,390
A latch that is sensitive to a level is commonly refered to a transparant or "D" latch. It is asynchronous, since the output can change at any time while the gating signal is high. Flip-Flops are edge triggered devices.
 

MrChips

Joined Oct 2, 2009
30,705
Who makes up the definition of these technical terms anyway?
Is there some international governing body that arbitrates what definition is correct?
Do we go along with what the majority of users use or what some arbitrary textbook chooses?

Let us not argue among ourselves over the difference between latch and flip-flop if this is simply a matter of technical semantics.

Here is my definition that I will choose despite what others might say.

A flip-flop is a bi-stable digital element that can have two stable states, boolean false and true, 0 and 1, or low and high.

I have seen usage of the terms S-R latch and S-R flip-flop.
I have also seen D latches and D flip-flops. In my books a 7475 is a D latch while a 7474 is a D flip-flop.

According to the following source the words flip-flop and latch are interchangeable though as you read into the article one gets the impression that the difference between the two is more subtle:

http://en.wikipedia.org/wiki/Latch_(electronic)

Edit: A 7474 is also an S-R flip-flop. I have never seen anyone refer to this function as an S-R latch.

For clarity, I will continue to refer to cross coupled NOT, NOR and NAND gates as flip-flops. If someone wants to call it a latch that is fine with me and I will not get into an argument.
 
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crutschow

Joined Mar 14, 2008
34,280
I certainly agree that there's not a standard distinction between a flip-flop and a latch (which is unfortunate). All I'm saying is that the data sheets for common CMOS and TTL circuits (as far as I've seen) use the term FF for clocked bistable elements and latch for async bistable elements. If you don't want to use those definitions, that's your prerogative. But it seems a handy distinction to differentiate between the two types of operation without having to explain which one you are referring to.
 

Brownout

Joined Jan 10, 2012
2,390
All I'm saying is that the data sheets for common CMOS and TTL circuits (as far as I've seen) use the term FF for clocked bistable elements and latch for async bistable elements.
As well as most engineering textbooks. There is a clar distinction in digital circuit design. Latches are usually avioded and reported by design rules checking software. No so for flip flops.
 
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