3bit resistor-string DAC

Thread Starter

adeboy

Joined Dec 12, 2012
17
hello peeps
someone pls save me before i go crazy...i need to design a 4-bit DAC similar to the 3-bit i uploaded but i need to know how the 3-bit performs before i can even attempt a 4bit.
can someone explain how fig 12.1 operates?

thanks
 

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tubeguy

Joined Nov 3, 2012
1,157
Figure 12-1 and 12-3 work the same way,
Left out in figure 12-1 are a few inverter gates and connections.
Notice some of the Fet gates are labeled b1, NOT b1, b2, NOT b2 etc.
Connect all the like labeled gates together using inverters to provide the NOT's. Come back if I'm as clear as mud. :)
 

Thread Starter

adeboy

Joined Dec 12, 2012
17
thanks guys, what i would like to know is the operation of the device as a whole, say if there is a 101 input ,how do i analyse the output as a analogue value? Knowing these concept will enable me build say a 4- or 8- bit that i want to build.
What i know is that there is no current going thrugh the input of the op-amp and the voltage at the input is buffered to the output,how do we determine the voltage? Say if i have a ref voltage of 8v ,how do i input a binary 101 and determine the output for example?

thanks
 

WBahn

Joined Mar 31, 2012
29,979
thanks guys, what i would like to know is the operation of the device as a whole, say if there is a 101 input ,how do i analyse the output as a analogue value? Knowing these concept will enable me build say a 4- or 8- bit that i want to build.
What i know is that there is no current going thrugh the input of the op-amp and the voltage at the input is buffered to the output,how do we determine the voltage? Say if i have a ref voltage of 8v ,how do i input a binary 101 and determine the output for example?

thanks
Since these are all NFETs, when the logic signal applied to the gate is HI, the FET looks like a closed switch (or, more accurately, a reasonably low valued resistor) while if the gate voltage is LO it looks like an opened switch (or, more accurately, a very high valued resistor).
 
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Thread Starter

adeboy

Joined Dec 12, 2012
17
hello you didnt make complete sense you were talking about the gates being high twice,or did you mean high and then low? can u make an example say like input binary 101 and and a 5v ref what do i get at the output,this will allow me be able to analyse all binary combination myself.
if i have 000 then i think b1not b2not and b3not will all be high and there will be 0v at the output i guess,how do i analyse if i have say b1not b2 and b3 ie 011 for example
 

WBahn

Joined Mar 31, 2012
29,979
hello you didnt make complete sense you were talking about the gates being high twice,or did you mean high and then low? can u make an example say like input binary 101 and and a 5v ref what do i get at the output,this will allow me be able to analyse all binary combination myself.
if i have 000 then i think b1not b2not and b3not will all be high and there will be 0v at the output i guess,how do i analyse if i have say b1not b2 and b3 ie 011 for example
I had a typo -- the second HI should have been a LO. Sorry for that, but you should already know this level of FET behavior.

So let's take your example of 011. If b1not is HI, then b1 is LO, correct? Similarly, if b2 and b3 are HI, then b2not and b3not are LO, correct? So any gate controlled by b1, b2not, or b3not are OFF and effectively removed from the circuit. So draw the circuit with those gates removed and then consider all of the remaining FETs as closed switches. What node in the resistor chain is connected to the input of the buffer?



What is the voltage on that node?
 

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Thread Starter

adeboy

Joined Dec 12, 2012
17
goodness, that means if the reference voltage at the top is 8v that means 3v is buffered out? is this right ? anyway what i am taking away from this ur analysis is this way u have highlighted the part and i can use that to get all combinations and even if i have 8 bits, this is cool!!
 
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