Can someone explain what a cascode configurations purpose is? I have attached a schematic of it. I understand that Q5 and Q6 form a current mirror that makes the current running through their collectors the same assuming that they are the same transistors. But what is Q7, Q3 and Q4 doing? I believe that Q1 and Q2 form my differential amplifier which amplifies the difference of my input signal. Also why is Q7 a pnp and Q3 and Q4 a npn?
Cascode Configuration
- Thread starter Hurt_it_Circuit
- Start date
The circle with an arrow at the bottom is a single ended constant current regulator. Q1 and Q2 are the differential pair. Vbias on the Q3 and Q4 bases locks the collector voltage of Q1 and Q2 at the same level as each other. Q5 and Q6 are an equal splitting (2 ended) current mirror.
When Vd+ becomes more positive than Vd-, Q1, having its collector voltage locked, and its current budget locked, has only one choice, to reduce its collector to emitter voltage. That pulls down the emitter of Q3 by just a little bit. Maybe as little as a few microvolts. The current through Q3 can not change, so the collector voltage on Q3 becomes less positive. This tries to pull more current down through Q7, but Q7 is on a locked current budget, so it changes by supporting less voltage from emitter to collector, thus making the output more positive. Meanwhile, while Q2 has its base less positive than the base of Q1, so it tries to shut off. That raises the emitter voltage of Q4 by a few microvolts and the collector voltage of Q4 becomes more positive.
Good enough?
When Vd+ becomes more positive than Vd-, Q1, having its collector voltage locked, and its current budget locked, has only one choice, to reduce its collector to emitter voltage. That pulls down the emitter of Q3 by just a little bit. Maybe as little as a few microvolts. The current through Q3 can not change, so the collector voltage on Q3 becomes less positive. This tries to pull more current down through Q7, but Q7 is on a locked current budget, so it changes by supporting less voltage from emitter to collector, thus making the output more positive. Meanwhile, while Q2 has its base less positive than the base of Q1, so it tries to shut off. That raises the emitter voltage of Q4 by a few microvolts and the collector voltage of Q4 becomes more positive.
Good enough?
Actually, Q5 and Q6 are not a current mirror, even though it sure looks like it. In a basic current mirror, you have a reference (or programming) current that goes through a diode-connected transistor in order to establish a base-emitter voltage that is then applied to another transistor in order to, ideally, replicate the reference current in that output transistor.
In this circuit, the reference current for the mirror is the left hand side (flowing from the collector of Q5 to the collector of Q3), hence it would need to be Q5 that is diode connected, not Q6.
One of the problems with a basic current mirror is that it has pretty low output impedance due to the Early effect. Is you change the Vce, you change the collector current. The output impedance is Rout=V_A/Ic and since typical numbers are V_A=40V and Ic=10mA, you often get output impedances on the order of less than a kilohm to a few hundred kilohms.
The circuit consisting of Q5, Q6, and Q7 is known as a Wilson current mirror. The addition of Q7 and reversing the current mirror composed of Q5/Q6 results in significantly greater output impedance.
How this works, qualitatively, is pretty straightforward. You have a current source, Q3, that is producing your reference current. It wants to make this current flow in Q5. But since Q5 is no longer diode-connected, it has to change the collector voltage on Q5 to change the current through the Early effect. Even with an output impedance of just 1kΩ this would mean changing the voltage by 1V just to change the current by 1mA. But the presence of Q7 means that changing the collector voltage of Q5 changes the base-emitter voltage of Q7 which changes how much current it wants to make flow through its collector and, hence, Q6. Since Q6 IS diode-connected, it has a really low input impedance -- a change of less than 20mV will double the current in it. But Q6 is the now the programming current for Q5, so as its current increases, it increases the Vbe voltage on Q5 to increase its current. As a result, the collector voltage on Q5 only has to change by about 40mV to double the current in it. If the DC bias current is 10mA, that gives an input impedance of about 4Ω.
The output impedance, on the other hand, is very high because in order to load the output of Q7 to change the current, you aren't just interacting with the Early effect in Q7. For instance, let's say that you lower the voltage on the collector of Q7, which would tend to increase the current. But if the current increases in Q7 it also increases in Q6, which changes Vbe on it and, therefore, on Q5 causing an increase in current in Q5. But if the current coming out of Q5 is more than the reference current going into Q3, the Q3 transistor will increase its collector voltage in order to lessen it, which will increase the base voltage on Q7, which means a lower Vbe for Q7 which, in turn, reduces Vbe for Q6 and Q5 resulting in the current dropping. Thus, changing the voltage at the collector of Q7 (the output of the current mirror) initiates a feedback process that reacts very forcefully to restore the output current back to the reference current. The effect is to increase the output impedance so that it is about a factor of β/2 greater than the Early-based output impedance of Q7, so an increase of about 100 in rough terms. Thus it because very practical to get a current mirror that has an output impedance (at low frequencies) of 10MΩ or more.
So much for the Wilson mirror. Now let's turn our attention to the role of the cascode transistors, Q3 and Q4. In simple terms, they are current buffers that have very low input impedance and very high output impedance.
So first, let's examine why having a high output impedance for the bottom part is important. This amplifier produces a voltage output by getting two current sources to fight each other. When you have an unbalanced input signal (i.e., when the differential voltage is non-zero), the transistors in the differential pair, Q1 and Q2, produce two different output currents. The one coming out of Q1 is the reference current for the current mirror, which because the nominal output current of Q7. But the output current from Q2 is different. Yet, neglecting any load on the output node, these two current sources are in series and hence HAVE to have the same current. This is resolved only because the two current sources are NOT ideal current sources, but rather have finite output impedance. As a result, the voltage on the shared node (v_o) will move toward the source that is trying to put out the higher current. This will result in that source putting out a bit less current and the other one, the one that wants to put out the smaller current, putting out a bit more current. The voltage continues to move until the two current sources are content putting out the same current. If one of the two sources has a low output impedance, then the amount that the voltage needs to change by in order to balance out the mismatch will be dictated by that impedance; the current will simply be the current that the higher output-imedance source wants to deliver. But if the outputs of the top and bottom sources are at least roughly comparable, then you will achieve the maximum swing in output voltage per current mismatch (which translates directly into the overall voltage gain of the amplifier) because each source has to be pulled away from the no-mismatch output by a significant amount.
So that's WHY we need the bottom part to have a high output impedance. Now we can consider HOW the cascode stage accomplishes this.
With a fixed bias voltage on the base of transistors Q3 and Q4, note that they are independent. Don't make the mistake of thinking that there is any interaction between them at all. So let's consider a stack of two transistors, either Q1/Q3 or Q2/Q4. Let's use Q2/Q4. The fact that Q4 has a fixed base voltage means that the emitter voltage of Q4, and hence the collector voltage of Q2, is all-but fixed at one diode drop below that. Therefore Q2 sees a very Vce that changes very little as the output voltage changes. So let's see what happens if the output voltage changes. Let's say that the output voltage goes up by some amount which, due to the Early effect in Q4, would normally result in an increase in current in Q4. But this would require a similar increase in the current in Q2, which would require it's collector voltage to increase by the same amount. But as soon as the collector voltage of Q2 started to go up, the Vbe of Q4 goes down which causes it to lower the output voltage in order to lower the output current. The net result of this feedback mechanism is to increase the typical BJT output resistance by a factor a several hundred to perhaps a few thousand. Thus the lower source will generally have significantly higher output impedance than the Wilson mirror.
The overall output impedance of this voltage amplifier is the parallel combinatin of the two, which will normally mean that it is about equal to the Wilson mirror output impedance. Since we don't like high output impedances for voltage amplifiers, this stage is almost always followed by a buffer amplifier whose input impedance is as high as we can make it, but still often represents a load on this amplifier that is significant and must be taken into account.
In this circuit, the reference current for the mirror is the left hand side (flowing from the collector of Q5 to the collector of Q3), hence it would need to be Q5 that is diode connected, not Q6.
One of the problems with a basic current mirror is that it has pretty low output impedance due to the Early effect. Is you change the Vce, you change the collector current. The output impedance is Rout=V_A/Ic and since typical numbers are V_A=40V and Ic=10mA, you often get output impedances on the order of less than a kilohm to a few hundred kilohms.
The circuit consisting of Q5, Q6, and Q7 is known as a Wilson current mirror. The addition of Q7 and reversing the current mirror composed of Q5/Q6 results in significantly greater output impedance.
How this works, qualitatively, is pretty straightforward. You have a current source, Q3, that is producing your reference current. It wants to make this current flow in Q5. But since Q5 is no longer diode-connected, it has to change the collector voltage on Q5 to change the current through the Early effect. Even with an output impedance of just 1kΩ this would mean changing the voltage by 1V just to change the current by 1mA. But the presence of Q7 means that changing the collector voltage of Q5 changes the base-emitter voltage of Q7 which changes how much current it wants to make flow through its collector and, hence, Q6. Since Q6 IS diode-connected, it has a really low input impedance -- a change of less than 20mV will double the current in it. But Q6 is the now the programming current for Q5, so as its current increases, it increases the Vbe voltage on Q5 to increase its current. As a result, the collector voltage on Q5 only has to change by about 40mV to double the current in it. If the DC bias current is 10mA, that gives an input impedance of about 4Ω.
The output impedance, on the other hand, is very high because in order to load the output of Q7 to change the current, you aren't just interacting with the Early effect in Q7. For instance, let's say that you lower the voltage on the collector of Q7, which would tend to increase the current. But if the current increases in Q7 it also increases in Q6, which changes Vbe on it and, therefore, on Q5 causing an increase in current in Q5. But if the current coming out of Q5 is more than the reference current going into Q3, the Q3 transistor will increase its collector voltage in order to lessen it, which will increase the base voltage on Q7, which means a lower Vbe for Q7 which, in turn, reduces Vbe for Q6 and Q5 resulting in the current dropping. Thus, changing the voltage at the collector of Q7 (the output of the current mirror) initiates a feedback process that reacts very forcefully to restore the output current back to the reference current. The effect is to increase the output impedance so that it is about a factor of β/2 greater than the Early-based output impedance of Q7, so an increase of about 100 in rough terms. Thus it because very practical to get a current mirror that has an output impedance (at low frequencies) of 10MΩ or more.
So much for the Wilson mirror. Now let's turn our attention to the role of the cascode transistors, Q3 and Q4. In simple terms, they are current buffers that have very low input impedance and very high output impedance.
So first, let's examine why having a high output impedance for the bottom part is important. This amplifier produces a voltage output by getting two current sources to fight each other. When you have an unbalanced input signal (i.e., when the differential voltage is non-zero), the transistors in the differential pair, Q1 and Q2, produce two different output currents. The one coming out of Q1 is the reference current for the current mirror, which because the nominal output current of Q7. But the output current from Q2 is different. Yet, neglecting any load on the output node, these two current sources are in series and hence HAVE to have the same current. This is resolved only because the two current sources are NOT ideal current sources, but rather have finite output impedance. As a result, the voltage on the shared node (v_o) will move toward the source that is trying to put out the higher current. This will result in that source putting out a bit less current and the other one, the one that wants to put out the smaller current, putting out a bit more current. The voltage continues to move until the two current sources are content putting out the same current. If one of the two sources has a low output impedance, then the amount that the voltage needs to change by in order to balance out the mismatch will be dictated by that impedance; the current will simply be the current that the higher output-imedance source wants to deliver. But if the outputs of the top and bottom sources are at least roughly comparable, then you will achieve the maximum swing in output voltage per current mismatch (which translates directly into the overall voltage gain of the amplifier) because each source has to be pulled away from the no-mismatch output by a significant amount.
So that's WHY we need the bottom part to have a high output impedance. Now we can consider HOW the cascode stage accomplishes this.
With a fixed bias voltage on the base of transistors Q3 and Q4, note that they are independent. Don't make the mistake of thinking that there is any interaction between them at all. So let's consider a stack of two transistors, either Q1/Q3 or Q2/Q4. Let's use Q2/Q4. The fact that Q4 has a fixed base voltage means that the emitter voltage of Q4, and hence the collector voltage of Q2, is all-but fixed at one diode drop below that. Therefore Q2 sees a very Vce that changes very little as the output voltage changes. So let's see what happens if the output voltage changes. Let's say that the output voltage goes up by some amount which, due to the Early effect in Q4, would normally result in an increase in current in Q4. But this would require a similar increase in the current in Q2, which would require it's collector voltage to increase by the same amount. But as soon as the collector voltage of Q2 started to go up, the Vbe of Q4 goes down which causes it to lower the output voltage in order to lower the output current. The net result of this feedback mechanism is to increase the typical BJT output resistance by a factor a several hundred to perhaps a few thousand. Thus the lower source will generally have significantly higher output impedance than the Wilson mirror.
The overall output impedance of this voltage amplifier is the parallel combinatin of the two, which will normally mean that it is about equal to the Wilson mirror output impedance. Since we don't like high output impedances for voltage amplifiers, this stage is almost always followed by a buffer amplifier whose input impedance is as high as we can make it, but still often represents a load on this amplifier that is significant and must be taken into account.
The currents are only equal if the collector voltages are equal. For basic design purposes this is a reasonable assumption to make, but it is not the case that the degree to which the currents are not equal is always the result of undesireable factors. In many circuits, the operation relies on them not being the same or on the circuit behavior that results from forcing them to be the same when they don't want to be.
It is a current mirror ONLY if the reference input is on the right and the output is on the left. Admittedly, this is arguably a case of semantics. For instance, if you have a circuit that uses a zener diode to produce a reference voltage and you put the diode in backwards, it is reasonable to say that, functionally, it is no a zener diode any more but just a regular diode. But it is also reasonable to say that it is still a zener diode but that it is not currently being used for its zener behavior.
The Q5/Q6 pair are not a current mirror as seen by the bottom half of the circuit. But they ARE a current mirror that make up a subcircuit that is part of the Wilson current mirror consisting of Q5, Q6, and Q7.
One might also expect the base bias for Q3 & Q4 to be decoupled to ground. This means Q1 & Q2 collectors see low load impedance. This reduces the Miller effect degradation of Q1 & Q2 gain bandwidth. Q3 & Q4 compensate the low gain value for Q1 & Q2 acting alone. Being in common base mode would nullify any Miller degradation of Q3 & Q4.
I get it. They are running way over on the left of the characteristic curve so you can force a current change by changing the collector voltage. I call that the voltage starved region, but there is a "real" word for it. Just saw the graph a week ago. Is it the triode region?
No, active BJT circuits like this are almost always intended to operate in the linear region. The region you are talking about is the saturation region. In the saturation region, the output resistance of the BJT is very low and very little change in Vce occurs even for significant changes in Ic. In the linear region, an ideal BJT has a flat characteristic and changing Vce has no effect on Ic. But in reality, the characteristic is sloped slightly. If you extend the slope back to where it intersets the Vce axis, you find that all of the slopes from the curves with different base currents (or, equivalently, base-emitter voltages) intersect at nearly the same point. This point is -V_A where V_A is known as the Early voltage for that transistor.
Looking at if from my self taught point of view, the alleged current mirror isn't because the collector on the right transistor is at one Vbe below the emitter, and that voltage can't change. The transistor on the left is allowed to have several volts on its collector, and that changes the current through it in spite of the fact that its emitter and base are locked to a transistor that has a constant current running through it.
It is interesting to compare cascode with active load configuration and be able to distinguish between them.
The active load tries to maximise the collector (load) impedance which maximises voltage gain.
The cascode tries to minimise collector impedance which minimises instability and increases usable frequency response.
Here is a real world example of use in discrete circuitry.
The active load tries to maximise the collector (load) impedance which maximises voltage gain.
The cascode tries to minimise collector impedance which minimises instability and increases usable frequency response.
Here is a real world example of use in discrete circuitry.
Attachments
Ignoring the current mirror aspect of your circuit, the cascode is a common emitter stage driving a common base stage - very good for high frequency amplifiers. the common emitter stage produces medium current gain and the common base stage produces large voltage gain (but current gain less than unity). In the days of CRTs, they were used as cathode driver/video amplifiers - the good ones were buffered by a complementary pair of emitter followers to drive the CRT cathode capacitance.
You can also make a cascode with FETs - a dual gate MOSFET is pretty much a monolithic cascode.
Nope. In fact, if you look at the Wilson mirror, the collector voltage of Q5 is locked to 2Vbe below the emitter -- one Vbe from the diode-connected Q6 and then a second from the Vbe of Q7. For better accuracy, you can add a fourth transistor and place it in the collector path of Q5 above the Q7 base connection and diode-connect it. This holds the Vce of both Q5 and Q6 at one Vbe resulting in better matching.
The basic behavior of a current mirror is only understandable if you look at the BJT as a voltage-controlled device, and not a current-controlled one. In the voltage-controlled model, the Ic is a function of Vbe. Consider just a diode-connected transistor: Whatever is producing the reference current through the transistor has to adjust the collector voltage so that the Vbe reaches equilibrium at the desired collector current. This is easy to achieve since just putting a resistor between the collector and a suitable voltage supply will cause this to happen. Thus the diode-connected transistor automatically produced the Vbe that is consistent with the collector current actually running through it (at a Vce equal to that same Vbe). If that Vbe is then applied to another transistor, the other transistor is now set up to want to produce that same collector current (if Vce on it is also equal to Vbe). This is the mirror action.
To the degree that Vce of the second transistor is not equal to Vbe, you will get a different current in accordance with the output impedance of the transistor. The fractional change in the collector current is equal to the fractional difference in collector voltage compared to the Early voltage. Thus, if the Early voltage is 40V, it would take a 4V difference in order to result in a 10% change and a 40V difference to double it. Note that I am only talking about changes in collector voltage that tend to increase collector current; if you change the collector voltage the other way you quickly take the second transistor out of the linear region and into saturation and then all bets are are off.
By adding the additional transistor and and reversing the mirror (i.e., making it a Wilson mirror), now it would take a change of around 40V to produce a 1% change in the current.
Another way of looking at the Wilson mirror is to realize that the output of the overall mirror (the collector current of Q7) is also the reference current for the underlying basic mirror formed by Q5 and Q6. So Q6 and Q7, by themselves, for a current source whose output is controlled by the base voltage on Q7 relative to Vcc (just like a normal transistor). The purpose of Q5 is to mirror this current and compare it to a reference current with any mismatch resulting in the collector voltage of Q5 being pulled so as to lessen the mismatch. But since this IS the base voltage of Q7, the current source is reprogrammed at the same time in a direction that also reduces the mismatch and this is the dominant correction mechanism.
In fact, you can remove the Q3 cascode transistor from the circuit and node notice a huge impact. It's real role isn't to increase the output resistance of the left side of the circuit, but really just to hold the collector voltage of Q1 to the same voltage that the collector of Q2 is at to improve matching.
Quote: The currents are only equal if the collector voltages are equal.
Quote: if you look at the Wilson mirror, the collector voltage of Q5 is locked to 2Vbe below the emitter
OK. Q5 and Q6 are not a current mirror because the collector voltages are different and their currents are not equal to each other, but the collector voltages don't change, neither do the base or emitter voltages, therefore, they are both constant current devices, just, one of them carries more current than the other.
That certainly clears up why this circuit does not work like I described it.
Now, if you could just explain the operation of the whole amplifier in less than 500 words...
Quote: if you look at the Wilson mirror, the collector voltage of Q5 is locked to 2Vbe below the emitter
OK. Q5 and Q6 are not a current mirror because the collector voltages are different and their currents are not equal to each other, but the collector voltages don't change, neither do the base or emitter voltages, therefore, they are both constant current devices, just, one of them carries more current than the other.
That certainly clears up why this circuit does not work like I described it.
Now, if you could just explain the operation of the whole amplifier in less than 500 words...
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This statement is in the context that the emitters are tied together. The real requirement is that the collector-emitter voltages have to be equal (assuming equal Vbe and matched transistors).
Correct, but that means that the difference between the collector voltages is about 0.7V and if the Early voltage is 70V (40V to 100+V are typical ranges, so I'm using 70V just to keep the numbers simple) then the current mismatch do to non-equal Vce will only be about 1%. It's unlikely that the basic matching of the devices will be that good. This is why most Wilson mirrors don't bother with the balancing diode (or diode-connected transistor), because you are addressing a problem that is probably already lost in the weeds.
No. This is not it at all. Q5 and Q6 ARE a current mirror, but not as seen by the circuit consisting of the NPN transistors, which is the point I was trying to make. It is a current mirror that is only seen as such by the internal view of the Wilson current mirror of which it is a part. The NPN part of the circuit see a current mirror made of of Q5, Q6, and Q7 with an input port (that is internally connected to the collector of Q5 and the base of Q7) and an output port (that is internally connected to the collector of Q7).
The collector and base-emitter voltages DO change, but not by tens of volts. Instead, they change by tens of microvolts. Except for the collector voltages on Q4 and Q7. Those DO change by volts or, if Vcc is high enouigh, tens of volts.
Sure. It can be made real short. Depends on how much can be assumed about the reader's knowledge of the prior level of circuits. How about the following as a middle-of-the-road level explanation (at less than half the requested 500 words)?
Q1 and Q2 form a differential current source with a transconductance gm. Half of the small signal output current is sunk by Q1 and half is sourced by Q2. The transistors Q3 and Q4 act as current buffers in order to significantly increase the output impedance of the bottom half of the amplifier. Thus Q3 wants to sink the same current as Q1 and Q5 wants to source the same current as Q2(ignoring the slight difference caused by the non-zero base current needed by Q3 and Q4).
The current sunk by Q3 serves as the reference current for the Wilson current mirror consisting of Q5, Q6, and Q7. The output of the Wilson mirror, Q7, wants to source the same current that is sunk by Q3, but it is connected to Q4 which also wants to source the same current that is sunk by Q3. But whatever is sourced by one has to be sunk by the other in order to satisfy KCL. Thus you have two non-ideal current sources that are in contention. Since they are non-ideal and have non-infinite output impedance, the contention is resolved by the voltage of one of them increasing while the voltage of the other decreases until a voltage is found that results in KCL being satisfied.
This equilibrium voltage is the amplifier's output voltage.
Presumably one could in part "resolve" the source contention issue by connecting a load resistance to the output terminal.
The gain could then be quantified to a reasonable approximation of gm*Rload.
A further presumption of a judicious choice of supply rail & bias voltages plus the fixed current source would give a static DC value of 0V relative to the power supply reference ground. This assumes a fair degree of device matching is achieved in fabrication.
The gain could then be quantified to a reasonable approximation of gm*Rload.
A further presumption of a judicious choice of supply rail & bias voltages plus the fixed current source would give a static DC value of 0V relative to the power supply reference ground. This assumes a fair degree of device matching is achieved in fabrication.
Oh, that will definitely help resolve it, but will drastically reduce the voltage gain. That may or may not be desireable (or even tolerable) in a given application.
If you can sacrifice the gain. I think this is the approximation that is done in many cases, even if you aren't trying to give up gain, just because you end up having no choice.
True, but almost impossible to achieve. I would doubt that amplifiers like this are very frequently used in an open-loop manner.
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