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  #1  
Old 05-01-2012, 02:38 PM
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Default Comparator open collector output

I'm doing a circuit, I was helped by wayneh to figure it out. It works in SIM, but I don't understand how or why. I have 2 comparators configured in a OR, according to LM393 datasheet.

Now, this confuses me. I understand that *what supposedly happens* is that if either comparator goes high, the output goes high. The way I see it though, these comparator outputs are open collector, so with the pullup resistor, the output should be high if both comparators are low. If one of them goes high, it will sink the current and the output will go low. I know I'm wrong, but I have no clue why I'm wrong. can someone set me straight?

What confuses me further is that this actually functions as an AND gate in my sim. When both of my comparators are high, the output is high. When I send one of my comparators low, the output is low. WTH?
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Old 05-01-2012, 03:48 PM
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When both outputs are high then they are turned off and the pullup resistor provides a high.
When one output is high then it is turned off and does nothing. Then if the other output goes low it makes the output low. Why do you think the output will be high?

The two comparators together form an AND gate. The output is high only when both output are high.
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Old 05-01-2012, 03:58 PM
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This is also called a WIRED-OR circuit.
This may sound confusing. That is because party-line bus systems are implemented using NEGATIVE LOGIC.

Consider an INTERRUPT line on an MCU. This is usually implemented as IRQ'
(IRQ inverted). (I would normally show this as IRQ overstrike, but don't see how to do this).

This means that IRQ' line has to go LOW to request an interrupt.
You can put multiple devices on the IRQ' line such as two or more comparators as in your example.

Any one of the comparators can pull the IRQ' line LOW to trigger an interrupt.
Hence it is an OR function for NEGATIVE LOGIC signals.

(If you look at DeMorgan's equivalent circuits, an OR gate with negated inputs and output is equivalent to an AND gate.)
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Old 05-01-2012, 04:07 PM
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Comparators can be configured as inverting or non inverting, so with inverting the ckt is a NOR gate, with non inverting ckt is a AND gate.
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Old 05-01-2012, 04:28 PM
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Quote:
Originally Posted by strantor View Post
......................

Now, this confuses me. I understand that *what supposedly happens* is that if either comparator goes high, the output goes high. The way I see it though, these comparator outputs are open collector, so with the pullup resistor, the output should be high if both comparators are low. If one of them goes high, it will sink the current and the output will go low. I know I'm wrong, but I have no clue why I'm wrong. can someone set me straight?

...........
You are just confused about the definition. When the output of the comparator is "high" (plus input voltage higher than the negative input voltage), the output transistor is off, not on, and thus the output voltages goes to a high voltage from the pullup resistor.
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Old 05-01-2012, 04:32 PM
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Quote:
Originally Posted by Audioguru View Post
When both outputs are high then they are turned off and the pullup resistor provides a high.
When one output is high then it is turned off and does nothing. Then if the other output goes low it makes the output low. Why do you think the output will be high?

The two comparators together form an AND gate. The output is high only when both output are high.
ok that makes sense, and that's what I observe. When it's high, the output transistor is off.
But, that's not what I read here:
Quote:

The comparator output satisfies the following rules:
  • When V+ is larger than V- the output bit is 1.
  • When V+ is smaller than V- the output bit is 0
........
  • When the output of the comparator is a 1, current flows from the comparator through the base of the transistor, out the emitter to ground, as shown.
  • When that current flows, the transistor acts like a switch that permits current to flow from the collect to the emitter to ground.

In my circuit, the voltage on the + terminal is 6V. The voltage on the - terminal is 156mV. With these 2 voltage inputs, according to the quoted piece (as I interpret it) both of my comparator output transistors should be conducting (LOW output from the wired-OR gate).

If I'm not mistaken, theres a disparity between what that page says and what you guys are saying. I totally agree with you though, because that's what I saw. Is there some scenario where what the page says is correct?
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Old 05-01-2012, 05:19 PM
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The article you found about comparators is completely WRONG!
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Old 05-01-2012, 05:22 PM
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It depends on if that transistor is part of the comparator or external to the comparator.
A single common emitter transistor stage acts as a logic inverter.
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Old 05-01-2012, 05:25 PM
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I think that in the article they treat transistor as a part of the comparator.
So I don't see any error in the article.
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Old 05-01-2012, 05:36 PM
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Just the opposite.

If you define a comparator as HIGH OUTPUT when V+ exceeds V-
then the transistor is outside of the comparator.

In either case, there is nothing wrong with the article.
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