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  #1  
Old 05-25-2010, 10:37 AM
bnmn bnmn is offline
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Default Op Amp switchable gain using a T-network

Hi, I am using a T network with a current to voltage convertor op amp circuit in order to switch between 2 gain values. I have an NPN transistor controlling the connection of the bottom of the T to ground. Through experimentation I have found that the set up works best when the cellector is grounded and the emitter is connected to the resistor. This seems strange as the transistor should be connected the other way round, should it not?. Also I have seen a similar circuit in another forum thread where the same idea is used, this time using an n channel MOSFET to control the switching, and with the Drain connected to ground instead of the source.

can anyone tell me why these circuits seem to work even though the transistors seem to be connected the wrong way round??

i was thinking of changing anyway from a transistor to an analogue switch but it would be good to understand why the transistor seems to work
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Old 05-25-2010, 12:13 PM
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beenthere beenthere is offline
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As with all things electronic, a schematic would be very useful to see how the circuit operates.
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Old 05-25-2010, 05:27 PM
bnmn bnmn is offline
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Default Uploaded schematic

Hi, here is a diagram of the circuit, it also works replacing the npn transistor with a mosfet where the source is connected to the resistor and the drain connected to ground
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  #4  
Old 05-25-2010, 08:38 PM
Darren Holdstock Darren Holdstock is offline
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A senior colleague who once worked for a discrete semi company taught me a neat little trick for getting a lower Vce(sat) from a bipolar transistor switch: Swap over the collector and emitter. This only works if the magnitude of Vbe is less than about 5V - beyond that a zener effect starts to kick in, and the small signal gain is permanently degraded, and taken even further and the device is destroyed. If you're switching loads with low logic-level voltages then it's a handy technique and enables the use of a cheaper transistors.

With this in mind, then the OP circuit should work as long as Vbe > -5 V (but < 1 V or so as this would meanimply a very high base current). But I wouldn't be keen on using it unless the spec is very slack as T-networks in feedback loops introduce a very large noise gain and output offset. If these aren't a problem, then go for it. If they are, then a CMOS switch (the DG211/DG212 are popular) will work well. There are two usual topologies here:

1) The normal approach is to have one feedback resistor from the op-amp output to the inverting input, and one switchable resistor from the inverting input to 0V for each gain setting, but the downside with this approach is the Rds(on) of the CMOS switch is included in the gain calculation, and this Rds(on) figure has a wide batch spread and a significant temperature coefficient. This is acceptable if the gain doesn't have to be too accurate. If not, then a better approach is:

2) Have a single feedback resistor from output to inverting input, and then a chain of resistors from the inverting input to 0V. The switches are then connected from each node in this resistor chain and commoned at the inverting input. Only a tiny current flows through the switches, so their Rds(on) can effectively be ignored and thus the gain spec is about as tight as the resistor tolerances. The downside to this method is that feedthrough from the switching control signal can be higher than with (1), due to the higher impedances seen by the switch signal terminals. This unwanted control gate feedthrough is always an issue with CMOS switches, and some circuits are more prone to this effect than others.

With circuit (1), any combination of switches may be enabled at any one time, making the gain combinations very flexible. With circuit (2), only one switch at a time may be used, and if unity gain is desired then a switch has to be placed between the op-amp output and the inverting input.

Hope this helps, and is not just an unwelcome can of worms.

Last edited by Darren Holdstock; 05-25-2010 at 08:40 PM. Reason: spelling, then typo in the correcting.
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  #5  
Old 05-25-2010, 09:53 PM
bnmn bnmn is offline
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Hi Darren, thanks for the reply, one question I have on the method you describe in (1) and (2) is that the voltage at the op amp negative input will be 0V since the positive input is held at 0V. So when the gain resistors are switched in how does current flow through them if both ends of the resistor are effectively at ground?

Thanks again.
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Old 05-26-2010, 07:26 PM
Darren Holdstock Darren Holdstock is offline
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Good question bnmn; the answer is that I'm an idiot. I should have mentioned that the two topologies I outlined are for the non-inverting series/voltage feedback configuration. The T-network in your OP is for the shunt/current feedback configuration only. I don't know of any decent gain switching arrangements for a shunt feedback amplifier that rival the aforementioned topology (2) for gain stability, but if that's not an issue then the usual method for your circuit is to have each gain switch, with its associated resistor, stacked up in parallel between the output and the inverting input. You can enable as many switches simultaneously as you like, as long as the op-amp output can drive the lower impedances.

I'd use CMOS switches rather than bipolar transistors, as the latter will introduce big offsets due to the Vce voltage drop. Making a switch from FETs isn't really viable as it's such a pain to bias the gates properly to ensure correct operation - have a look at the internal schematic for a 4066 or a DG212 to see what's required there.

Transimpedance amps (which is what the OP circuit is) have an intrinsic gain limitation set by stabilty criteria, as the feedback resistor interacts with any parasitic capacitance at the inverting input to form a pole, and this will cause gain peaking at the output. Quite often the first TI stage is followed by a second amplifier stage to get the required total gain.

It's difficult to know what to recommend without more spec. What are the expected current inputs, required voltage outputs and bandwidth?

Last edited by Darren Holdstock; 05-26-2010 at 07:27 PM. Reason: typoo
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  #7  
Old 05-26-2010, 08:08 PM
bnmn bnmn is offline
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Thanks Darren, I experimented today using the method of switching an additional resistor (10Mohm) across the output and negative input in order to achieve the higher gain (the 100K resistor gets switched out). I am using a CMOS switch (MAX4515).

The method works well and removes the offset error on the output of the op amp, I think that I might have to do something about the feedback capacitance as introducing the 10Mohm resistor reduces the cut off frequency substantially and I want to maintain a bandwidth of about 1KHZ.

Cheers.
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  #8  
Old 05-26-2010, 08:29 PM
Darren Holdstock Darren Holdstock is offline
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You're very welcome bnmn. You'll need some graphs and equations to work it all out properly, which is where I hand you over to the best people I know on the subject, Bonnie Baker, Bob Pease and Paul Rako. The info is mostly photodiode amp oriented, but it's pretty much the same thing.
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