Transistor Amplifier Design

I have some rough parameters for an amplifier design. I just wanted to confirm that I was thinking correctly in terms of my design approach.

Av=100
RL=10kΩ
Rin=>600Ω
Rout=<8Ω
Design for output swing as symmetrical as possible.

I have total leeway in terms of the configuration. I was going to design a common emitter for the first stage, to get the Av=100. Then use an emitter follower for the output stage to get the Rout=<8Ω. Is it reseasonable to design the 1st stage to get an input impedance of 600 Ω? It looks like I only have a 2N2222 for the design and I am to design for 150=<Beta=<250, in looking at the datasheet the minimum beta is 75, I'm assuming this means the 2N2222 I will be given will have a beta of greater than 150? Does this seem to be a reasonable assumption?

No spec was given on the required output current. The datasheet gave a Icmax of 1 A. I noticed the datasheet said beta is 100 to 300 for Ic=150mA and Vce=10v, I'm to use Vcc=18v, unless told differently should I design the max output current to be 150mA? Thanks for any input.

A schematic would be propitious in order for us to help you.

Austin

This was I had in mind, see attachment.
thanks

This is just a quick think through, but

Zin is roughly calculated as being the value of the base resistor to ground. As a first approximation
So a standard 620 ohm resistor could be used for R2, if you make the emitter resistor around 10 x less at around 62 ohms, and keeping the DC gain at around 20 max, making RC1 = 1.2K ohms, that would mean to get a gain of 100 a bypass capacitor with a series resistor across the emitter of around 10 ohms, would get the AC gain, but AC Zin would be lower, so a compromise must be made there, then matching the RC1 of 1.2K to the 8 ohms, using a emitter follower could be feasible.

This is just a quick guess to your question, what I threw out there is just a quick approximations, for a first approach to this design.

Take whatever you can gleem from it, if anything could be helpful.

Another way would be to start from the output, using your 8, ohms at the emitter, of the common collector stage, than work back through to the input to get your Zin, needed, as well as the gain needed.

One major question,

If your Load is 10K ohms, then why are you using such a low Zout to match it.

Is this a given, or your choice.

If it is a choice, you could make the design a lot easier, by making the Zout at around 10 x less than Rload, which would help matching Zin to Zout of the succeding stages...



It's late so I really can't take the time to really think through this right now...

Hope it helps in some way...

Your schematic is a preamp that drives 10k ohms, not a power amp that drives 8 ohms.

I understand concern, but the Rout and RLoad are the design requirement.

The way I would approach this for a first attempt,
would be to breadboard it,

design the common collector stage with the 8 ohms emitter resistor, across an 10K output,

then input a signal, as high as it would take, and check for distrortion, when you have a good signal with No distortion, than record that output signal value,

and then design the next CE stage to deliver that signal value to that stage, 600 ohms Zin is not all that high, so you should be able to get the Zin required if you do the output first.

Then work back to the input stage.

The ratio of 600 to 8 with a high gain of 100, would require some thinking and experimenting.

Does it matter how many transistors your allowed?

If not, then one SUGESTION, not the answer,

if you put 2 transistors in a darlington config. for the emitter follower stage, that would increase the Zin, then you could calculate for first approximations, what the Zin is by taking the MIN. beta, squareing that value, and multiplying by 8 ohms.

Than design 2 CE stages, and split the gain, working both with gain and Zin until you get a satisfactory design.

No set number of transistors, in fact it was stated if you can do it with one transistor, do with one? Along with meeting the specifications given, I have to show the design calculations, not do it empirically. Then build the circuit in the lab and compare the results. I'm going to do a design then model the design in Pspice, from which I would confirm and/or change my initial assumptions.

I can see where the Darlingtons will increase Zin of the emitter follower, 2*β*rpie, why is this important to the overall circuit Zin, required 600Ω? The gain of the emitter follower will also increase, but I assume it will still be ≈ 1.

I'm a little confused here:

'if you put 2 transistors in a darlington config. for the emitter follower stage, that would increase the Zin, then you could calculate for first approximations, what the Zin is by taking the MIN. beta, squareing that value, and multiplying by 8 ohms.'

When you say 'increase the Zin' do you mean of the emitter follower stage?

'Than design 2 CE stages, and split the gain, working both with gain and Zin until you get a satisfactory design. '

This is a different Zin, 600Ω, than the one above? When you say a satisfactorty design you mean circuit Zin of 600Ω and circuit gain of 100. Thanks for your help.

See if this helps clarify how a darlington pair increases input impedance to its stage.





Now with this you can design a CE stage to have a high enough collector resistor to be able to maintain good gain while further increasing the Zin to the next stage back..

This could be done with another CE stage to increase gain, or use one CE stage and do a split emitter resistance to get the full gain.

Just remember that the Zout feeding a stage should be at least 10 x smaller, to be able to keep the signal from being attenuated, going into the next stage.

If you designed a CE stage to feed this CC stage, then a collector resistor of around 750 ohms could be used to get a good output signal, and so on...

But remember don't make the emitter resistor for this next stage too low or you run into the problem of too low Zin, the whole design technique is to give enough gain to the stage while increasing the Zin to each stage.

These values are tradeoffs one to another until you get your targeted parameters, close as possible...

Another thing to consider is were designing according to a specific transistor, so there is a limit to how much current flows, thereby from my schem. the emitter voltage is sitting at 1v. using 150mA for IC.

By using different values of IC yu can increase the standby voltage, but don't go maxing out the IC or you have to use another transistor to handle a larger IC.

By rights the standing voltasge should be quiescent at half the supply voltage, but this would be too much current for this particular transistor, so again it is a tradeoff to what voltages and currents you design for meeting the data sheets for a given transistor...

Now there are times where in order to keep Zin high and gain somewhat feasible, you may have to make RC = to Zin of next stage it is feeding, in that case the gain for the particular stage, which normally is (RC / RE) will now be

( (RC /2) / RE ), where the signal will be attenuated by half...

So each design has it's own compromises and tradeoffs...

I used multisim with a 2n2222A for all stages, and I got about double the Zin called for and a gain of around 106.

5mV, in and 534mV out.

With standing current on the output of around 150mA.
Due to the transistor parameters.

You could design for higher standing current to get a higher Vout, if you wanted too.

One hint, and made the collector resistor for each CE stage equal to the Zin of the next stage, then used a emitter value (( 1/2 x RC ) / a chosen gain ))

That is how I did it, use whatever method you learned.

It can be done, just take what your learning and apply it in logical steps...

Any questions we will be glad to help out.

Hope this helps somewhat...

Thanks for the Darlington link. I forgot about the resistance relfection rule, it makes perfect sense that you can drop RE, because it is reflected back at beta1 x beta2.

When you say split emitter resistance, do you mean two emitter resistance and bypass on of them? Does the 62 Ω RE1 still seem like a good starting value to use?

The spec sheet shows a beta range of 150 to 300 at Ic=150mA and Vce=10v. My requirements are that I design for beta between 150 and 250, but I just noticed that my requirements also say I have Vcc=18v available with a Isupply max of 20mA. So I'm assuming my circuit can only draw 20mA max, the 2N2222 spec sheet says at Ic=10mA Vce=10v, beta is only 75. It seems that there is a conflict, designing for a beta of say 200 but only be able to have Ic=10mA, isn't going to give me the correct calculations? Am I missing something? What is your definition of standby volatage?

The project is stupid:
1) An output resistance of only 8 ohms but a load of 10k ohms.
2) An old 2N2222 transistor operating at only 20mA when its minimum hFE is only about 80.
3) A supply as high as 18V.

I'm guessing that the high beta values there giving you, is so you can calculate roughly Zin to a stage by the value of ((B+1) x RE), so the higher the beta the more your Zin is determined by the base to ground resistor, only.

I only used a beta of 100 to design the bias for the emitter follower stage, after that I didn't bother with beta, for the CE stages, because I tried to keep the base to ground resistor, around 10 x greater than RE, and not any larger.

This ensures the base current won't affect the base bias voltage, again higher beta would mean you could use a higher value for this resisor value. maybe 10 to 20 x RE.

The standing voltage is the voltage seen at the emitter of the output stage when NO signal is being applied.

Since I used 150mA. for standing current than my standing voltage was around 1.1V, or so.. I also used a standard 7.5 ohm resistor so Zout < 8 ohms.

Split resistance yeh, bypass one resitor to get a higher gain, but remember the Zin goes lower too..

You could work this design from the input impedance, as you are asking about the 62 ohm resistor, for emitter of CE stage.

I think by working from the output back to the input would be a much better alternative, because if you match impedances properly, then the imput impedances increase as you go further back to the input.

Also 20mA supply.

That's a whole new ballgame now, my circuit wouldn't pass, cause I'm using 150mA. at the least.
Much more considering the rest of the design.

If it is a 20mA supply, then they are really teaching ya's how to critically think through a design.

20mA, are you sure it is the VCC supply, and not the output current??

Your right about the conflict, it seems to me they are teaching you how to interpolate, which means is find a value of currents and beta, in between the data, that fits the criteria, you have to work under.

The whole design is very unusual, with a 10K load, and a 8 ohm Zout, and a 600 ohm Zin and a high gain of 100 with such a high supply voltage, then to top it off a maz current in the milliamp region, is really an exercise on interpolating, thinking 10 steps ahead, such as your entire circuit must be below a certain current value, there is a lot to consider with this design.

Your comment about the beta = 200 for zin purposes makes a lot of sense?

The requirement said Vcc=18v, Isupply =20ma max, so it looks to me like they are referring to the current from the voltage supply.

I had been working on the CE portion, calculating the bias resistors, couldn't get to run on Pspice, well it ran but Ib was 280ma and Ic was 3.8 ma which was actually what I had calculated for Ic. But not much of a current amp. This stage was configured V+=18 and V-=-18. I think I'll simplify things and go with a single voltage and start from the back end as you suggested, just wanted to feel like I was making progress. Calculations attached.

laguna92651 said:

it ran but Ib was 280ma and Ic was 3.8 ma

Click to expand...

Absolutely rediculous.
The entire project is rediculous.

Like audiguru said, in so many words, the parameters are very unrealistic, for a proper design.

As I read your first post, and your other with the 20mA supply,
I'm not sure I'm understanding what is the given set parameters, and what was your choice in this design.

So please,
give only the specific parameters, that you were told to use.

VCC=?
supply current=?
transistor type=?
Zout=?
Zin=?
Gain=?

Is there a specific Vin, or Vout?
Is there a specific bandwidth?

And any other specifics that are mentioned.


Please don't write down any of your choices, just what the parameters are that are given.

Then with these parameters a circuit can be designed.
If it is a realizable design, or they may be testing to see if you can determine if a circuit parameters are realizable...

I looked at your handwork calculations, your definately NO slouch, in trying to work with this, I commend you on the very good effort your putting forth, that's more math then what I use, now apply some ohms law calculations, and voltage divider calc., and you will have a good foundation, in the basics of transistor amp. design.

Keep up the good work..

Thanks for the input, I just don't have a good feel of what is reasonable or what I can assume and what I can't assume.

VCC=18
supply current=20mA max
transistor type=2N2222
Zout=<8
Zin=>600
Gain=>100
RL=10K (just added)

Is there a specific Vin, or Vout?-no
Is there a specific bandwidth?-no

Design for output swing as symmetrical as possible.
Design for standard values of R and C.

I need a drawing showing an input and output measurement scheme.

Forgot to add RL=10K

There are numerous ways to approach any design.

So Now we have good solid parameters to work in.

Since one thing for sure is 20mA, is max, then the design of the complete circuit, cannot go below 900 ohms.

Now here is where you can think creatively,

Supply is 18v.

Since no Vin, or Vout is given, then we have the option, to lower the stage voltages where needed,

I think that's the key right there to this whole design challenge, they let you choose the Vout you can attain. That leaves a lot of options to design with. A good thing...

so instead of using 18v. a volt.divider can be devised to accomodate less current draw, per stage.

I am going to see what I come up with and I'll post later, IF I can find a solution...

That would help you in this...