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#1
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Hi everyone. I have a question regarding the voltages of MOSFETs under certain bias conditions. In some situations, I see that the gate-source voltage is pulled to VDD, and the voltage is evaluated as VDD-VTH. What is the reasoning behind subtracting VTH from VDD? I thought the threshold voltage is just a level when the MOSFET turns on. How does it draw from VDD? Thanks.
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#2
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Can you post or link to an example of what you're talking about?
As far as an enhancement-mode MOSFET is concerned, it's the Vgs that determines whether it's ON, OFF, or partially conducting (resistive).
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General info: If you have a question, please start a thread/topic. I do not provide gratis assistance via PM nor E-mail, as that would violate the intent of this Board, which is sharing knowledge ... and deprives you of other knowledgeable input. |
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#3
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Sure, I uploaded a charge pump circuit I was looking at. When the output of the inverter is low, the description said point A is at VDD-VTH of the MOSFET M1. Why isn't it pulled to just VDD? Also, why use a MOSFET to pull it high, why not just use a resistor. Is it because MOSFETs generally take up less area on CMOS fabricated chips?
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#4
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This is a fragment of the internal design of an Integrated Circuit. The enhancement mode Fet used as a "pull-up" is made with a long, narrow channel (very small W/L) purposely to make it highly resistive. You cannot "buy" such a Fet as a discrete part from DigiKey
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Mike ML |
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#5
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From your original question;
if you use a FET as a source follower, even if you put the full positive supply on the gate, the source will be less positive by whatever gate-source voltage is needed to turn the device on at whatever source current it's providing.
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Robert Jenkins. |
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#6
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Thanks Mike. Ya I am aware that these are monolithic components, I am just wondering how the VDD-VTH is derived. I understand that the MOSFET gate is wired to VDD to limit current from VDD. Why subtract VTH from the VDD when you have a pull up MOSFET?
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#7
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Because the pull-up cannot pull it's source any higher than Vdd-Vth.
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Mike ML |
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#8
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It's like with a NPN bipolar emitter follower, the emitter is always around 0.7V negative of the base, as that's what it takes to turn the transistor on.
With an N channel mosfet source follower, if it needs eg. 3V gate-source to turn on, the source will always be 3V less than the whatever voltage is on the gate (otherwise it's not turned on..)
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Robert Jenkins. |
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#9
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Ohhh I see. So the voltage needed to turn on the MOSFET is essentially "drawing" what it needs from VDD. So the voltage they are talking about that is present across the cap. is the gate to source voltage. What is the drain-source voltage then? The drain is connected to a load, not a voltage source. Is the MOSFET in its linear or sat. mode?
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#10
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Quote:
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Mike ML |
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| Tags |
| gate, mosfet, source, voltage |
Related Site Pages
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| Section | Title | |||
| Textbook | Insulated-gate field-effect transistors (MOSFET) : Solid-state Device Theory | |||
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