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#1
04-29-2012, 12:12 PM
 malincik New Member Join Date: Apr 2012 Location: Czech Rep. Posts: 1
AD633 square root - Pspice simulation

I have a problem with simulation in PSpice, I use student version Cadence 16.2
I have to simulate a square root using IC AD633. This is my netlist:
Quote:
 *Semestralny projekt BMPS 2012* *Ondrej Malincik* *MET2* *ID 136555* *libraries used* .lib ad633.cir .lib ad711.cir .lib ua741.lib .model D1N4148 D (IS=0.1PA, RS=16 CJO=2PF TT=12N BV=100 IBV=0.1PA) XAD633 out 0 out 0 Vminus 0 3 Vplus ad633 XAD711 0 1 Vplus Vminus out ad711 *XUA741 0 1 Vplus Vminus out UA741 R1 in 1 10K R2 1 2 10K D1 3 2 D1N4148 Vpos Vplus 0 15 Vneg 0 Vminus 15 Vinput 0 in 10 Eideal out_ideal 0 value={sqrt(-10*v(in))} *.nodeset v(out)=10 *.nodeset v(in)=-10 .dc vinput -2 12 10m .probe .end
The netlist is the exact copy of Root Square from AD633 datasheet, Figure 14. ( here )

There is an ideal plot of root square using E type source, the green trace in the picture
The output trace of circuit is the red one and it is very far from square root

I tried to use different opamp model (ua741 written), no difference. Well, I tried to simulate Division, but there was a similar problem, strange plot of it. I think there is a problem with AD633 put in loopback of the opamp.
Simulation in OrCAD 9.1 student version crashes with DC convergence problem.

 Tags ad633, pspice, root, simulation, square

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